2.5 GHz低相位噪声LC压控振荡器

在0.35 μm SiGe BiCMOS工艺条件下,设计了一个全集成的低相位噪声LC压控振荡器(VCO).该VCO采用尾电阻结构替代传统的尾电流源结构实现电流控制,以减小尾电流源产生的噪声.该VCO的调谐范围为480 MHz,可以覆盖2.32～2.8 GHz.当振荡频率为2.5 GHz时,100 kHz和1 MHz频偏处的相位噪声分别为-104.3 dBc/Hz和-124.3 dBc/Hz.振荡器工作电压为5 V,尾电流为5 mA.工作在2.5 GHz时,其100 kHz频偏处的性能系数为-178 dBc/Hz.     

一种高性能全差分双环路VCO的设计

设计了一种基于SMIC 0.18μm RF 1P6MCMOS工艺的高性能全差分环形压控振荡器(ring-VCO),采用双环连接方式,并运用交叉耦合正反馈来提高性能。在1.8V电源电压下对电路进行仿真,结果表明:1)中心频率为500MHz的环形VCO频率调谐范围为341～658MHz,增益最大值Kvco为-278.8MHz/V,谐振在500MHz下VCO的相位噪声为-104dBc/Hz@1MHz,功耗为22mW;2)中心频率为2.5GHz的环形VCO频率调谐范围为2.27～2.79GHz,增益最大值Kvco为-514.6MHz/V,谐振在2.5GHz下VCO的相位噪声为-98dBc/Hz@1MHz,功耗为32mW。该VCO适用于低压电路、高精度锁相环等。     

60GHz宽调谐范围推—推压控振荡器设计

基于65nmCMOS工艺实现了60GHz推—推压控振荡器（VCO）设计。采用互补交叉耦合去尾电流源结构以降低相位噪声。压控振荡器输出包含两级缓冲放大器,第二级缓冲放大器偏置在截止区附近以增大二次谐波的输出功率。在1.2/0.8V电源电压下,压控振荡器核心和缓冲放大器分别消耗2.43mW和2.95mW。在偏离中心频率1MHz处相位噪声为-90.7dBc/Hz。输出功率为-2.92dBm。特别的,压控振荡器的调谐范围达到9.2GHz（15.3%）,与调谐范围相关的性能指标FOMT为-182.7dBc/Hz。该压控振荡器可应用于57GHz～64GHz开放频段超高速短距离无线通信。     

基于0.18μm SiGe BiCMOS工艺的60GHz VCO分析与设计

采用0.18 μm SiGe BiCMOS工艺,设计了一个60GHz的交叉耦合差分压控振荡器(VCO).通过分析传输线的性能,用λ/ 4短路传输线构造谐振回路.在分析VCO相位噪声的基础上,采用噪声滤波技术提高VCO的相位噪声性能.该VCO的工作电压为2.2V,偏置电流为11mA,频率调谐范围为58.377GHz～60.365GHz.当振荡频率为60.365GHz时,1MHz和10MHz频偏处的相位噪声分别为-79.1dBc/ Hz和-99.77dBc/ Hz.     

应用于毫米波系统的宽调谐范围SCTL-VCO

采用45 nm SOI CMOS工艺,设计了一种应用于毫米波系统的宽调谐范围VCO。采用具有高Q值且长度可灵活设计的开关耦合传输线(SCTL)作为谐振腔电感,通过控制耦合开关改变传输线的等效感值,在保持低相位噪声、不增加功耗和面积的情况下,提高了VCO的调谐范围。后仿真结果表明,不使用耦合开关的TL-VCO的调谐范围为45.6~57.1 GHz(22.4%),SCTL-VCO的调谐范围为42.25~59.92 GHz(34.6%)。相比TL-VCO,SCTL-VCO的调谐范围增大了53.7%。在整个调谐范围内,相位噪声为-112.1~-120.4 dBc/Hz@10 MHz,相应的FOM和FOMT分别为-178.3~-182.6 dBc/Hz和-189.1~-193.4 dBc/Hz,电源电压为0.7 V,VCO核心功耗为8.6~10.8 mW,面积为0.005 4 mm²。     

一种低压低相位噪声的C类VCO

提出了一种低压低相位噪声的C类VCO电路。低压条件下,基于振幅反馈环的C类VCO存在振幅小、相位噪声差的问题,可以通过移除尾电流源、增加低通滤波器等方式来改善相位噪声。基于SMIC 0.18 μm CMOS工艺,采用Cadence Spectre EDA软件对VCO进行仿真。结果表明,当载波频率为2.27 GHz时,在1 MHz频偏处VCO的相位噪声为-126 dBc/Hz,在供电电压为0.9 V时,功耗仅为2.5 mW,FOM值为-189 dBc/Hz。     

卫星电视天线射频电路中LC压控振荡器设计

设计了一款应用于卫星电视天线电路中低功耗、低相噪的宽带单片集成压控振荡器。该振荡器利用PMOS尾电流源和MIM电容阵列结构。在保证调谐范围的前提下,有效地降低了相位噪声。使得该压控振荡器实现了3.384～4.022 GHz频段的覆盖,在中心频率为3.7 GHz时,100 Hz和1 MHz频偏处的相位噪声分别为-90.4 dBc/Hz和-119.1 dBc/Hz,工作电压下为1.8 V,功耗仅为2.5 mW。     

频率覆盖3.2～6.1 GHz的CMOS LC VCO

通过提高MIM电容的调整范围,实现了一个覆盖3.2～6.1 GHz的CMOS LC VCO.该VCO使用0.18μm射频CMOS工艺制作,芯片面积约为1260μm×670μm.当输出5.5GHz时,VCO内核消耗功率为17.5mW;在100kHz频偏处的相位噪声是～101.67dBc/Hz.     

频率范围2.95-3.65GHz采用调谐曲线补偿的CMOS LC-VCO

本文提出了利用一种新型的谐振回路对调谐曲线进行补偿,频率范围为2.95~3.65GHz的CMOS LC-VCO. 该VCO采用AMOS可变电容,能实现其Q值和调谐范围的同时优化,通过线性化调谐曲线,减少了AM-PM噪声的转换。电路通过 0.18μm 1P6M CMOS工艺验证,面积仅为0.24mm2,整个VCO含输出缓冲在内的功耗为5.04mW,相位噪声在100KHz偏移处是-91dBc/Hz。     

低抖动锁相环中压控振荡器的设计

压控振荡器(VC0)作为PLL系统中的关键模块,其相位噪声对PLL相位噪声和抖动产生决定性影响.在对PLl系统噪声及VCO相位噪声分析的基础上,基于CSMC 0.5μm CMOS工艺,设计了一款低相位噪声两级差分环形VCO.Spectre RF仿真结果表明,VCO频率调谐范围为524 MHz～1.1 GHZ,增益最大值Kvco为-636.7 MHz/V,900 MHz下VCO相位噪声为-116.2dBc/Hz@1 MHz,功耗为21.2 mW.系统仿真结果表明,VCO相位噪声对PLL抖动的贡献小于1 ps.     

An Integrated 5–2.5-GHz Direct-Injection Locked Quadrature LC VCO

This letter presents an integrated direct-injection locked quadrature voltage controlled oscillator (VCO), consisted of a 5-GHz VCO integrated with injection locked LC frequency dividers for low-power quadrature generation. The circuit is implemented using a standard 0.18-mum CMOS process. The differential VCO is a full PMOS Colpitts oscillator, and the frequency divider is performed by adding an injection nMOS between the differential outputs of complementary cross-coupled np-core LC VCO. The measurement results show that at the supply voltage of 1.8-V, the master 5-GHz VCO is tunable from 4.73 to 5.74GHz, and the slave 2.5-GHz VCO is tunable from 2.36 to 2.87GHz. The measured phase noise of master VCO is -118.2dBc/Hz while the locked quadrature output phase noise is -124.4dBc/Hz at 1-MHz offset frequency, which is 6.2dB lower than the master VCO. The core power consumptions are 7.8 and 8.7mW at master and slave VCOs, respectively     

5-GHz Low Power Current-Reused Balanced CMOS Differential Armstrong VCOs

This letter proposes 5-GHz low power differential Armstrong voltage controlled oscillators (VCOs) based on balanced topology. One designed VCO uses two single-ended Armstrong VCOs coupled to each other in parallel by balanced structure. The other current-reused VCO uses two single-ended Armstrong VCOs stacked in series. The former VCO oscillates from 4.96 to 5.34GHz and the power consumption is 3.9mW at 0.6-V supply voltage. The latter operates from 4.98 to 5.45GHz and dissipates 2.59mW at 1.8-V supply voltage. The measured phase noises are about -116.71dBc/Hz and -110.02dBc/Hz at 1-MHz offset frequency from 5.1-GHz band, respectively. The former and the latter VCO have an advantage of low power consumption and provide a good figure of merit of about -185dBc/Hz and -180dBc/Hz, respectively     

Low noise 5 GHz differential VCO using InGaP/GaAs HBT technology

The authors present the first InGaP/GaAs HBT differential VCOs with low phase noise performance. One is a cross coupled differential VCO, and the other is a Colpitts differential VCO. To achieve a fully integrated VCO, collector-base junction capacitance of HBT transistor is used for the frequency tuning varactor. The measured output frequency ranges of VCOs are 290 MHz and 190 MHz, and the phase noises at an offset frequency of 1 MHz are -118 dBc/Hz and -117 dBc/Hz respectively. The each VCO core dissipates 13.2 mW from a 3.5 V supply, and the output power is about -0.2 dBm. Concerned with cross coupled VCO, it shows the figure of merit of -179 dBc/Hz, which is the best result among the reported compound semiconductor FET and HBT VCOs.     

A 21 GHz Complementary Transformer Coupled CMOS VCO

A new topology for low power voltage controlled oscillators (VCOs) using a 0.18-mum CMOS foundry process is presented in this letter. From the measured results, the VCO exhibits a tuning range of 3% at 21.3 GHz. Using complementary topology, the core power consumption and the output power are 9.6 mW and -3 dBm, respectively. With the broadside coupled transformer, the VCO achieves a good phase noise of -106 dBc/Hz at 1 MHz offset and a compact chip size of 350 times 470 mum². It is the first time that the broadside coupled transformer approach is applied to transformer coupled CMOS VCOs.     

A 1-V 9.7-mW CMOS Frequency Synthesizer for IEEE 802.11a Transceivers

A 1-V CMOS frequency synthesizer is proposed for wireless local area network 802.11a transceivers using a novel transformer-feedback voltage-controlled oscillator (VCO) for low voltage and a stacked frequency divider for low power. Implemented in a 0.18-mum CMOS process and operated at 1-V supply, the VCO measures a phase noise of -140.5 dBc at an offset of 20 MHz with a center frequency of 4.26 GHz and a power consumption of 5.17 mW. Its tuning range is as wide as 920 MHz (23%). By integrating the VCO into a frequency synthesizer, a phase noise of -140.1 dBc/Hz at an offset of 20 MHz is measured at a center frequency of 4.26 GHz. Its output frequency can be changed from 4.112 to 4.352 GHz by switching the 3-bit modulus of the programmable divider. The synthesizer consumes only 9.7 mW and occupies a chip area of 1.28 mm².     

SiGe Bipolar VCO With Ultra-Wide Tuning Range at 80 GHz Center Frequency

A SiGe millimeter-wave VCO with a center frequency around 80 GHz and an extremely wide (continuous) tuning range of 24.5 GHz ( ap 30%) is presented. The phase noise at 1 MHz offset is -97 dBc/Hz at the center frequency (and less than -94 dBc/Hz in a frequency range of 21 GHz). The maximum total output power is about 12 dBm. A cascode buffer improves decoupling from the output load at reasonable VCO power consumption (240 mW at 5 V supply voltage). A low-power frequency divider (operating up to 100 GHz) provides, in addition, a divided-by-four signal. As a further intention of this paper, the basic reasons for the limitation of the tuning range in millimeter-wave VCOs are shown and the improvement by using two (instead of one) varactor pairs is demonstrated.     

A 5.6 GHz Low Power Balanced VCO in 0.18 $mu$m CMOS

A 5.6 GHz balanced voltage-controlled oscillator (VCO) is designed and implemented in a 0.18 mum CMOS 1P6M process. It consists of two single-ended complementary Colpitts LC-tank VCOs coupled by two pairs of varactors. At the supply voltage of 1.2 V, the output phase noise of the VCO is -119.13 dBc/Hz at 1MHz offset frequency from the carrier frequency of 5.6 GHz, and the figure of merit is -190.29 dBc/Hz. Total VCO core power consumption is 2.4 mW. Tuning range is about 600 MHz, from 5.36 to 5.96 GHz, while the control voltage was tuned from 0 to 1.2 V.     

A Millimeter-Wave CMOS LC-Tank VCO With an Admittance-Transforming Technique

A novel circuit topology suitable for millimeter-wave voltage-controlled oscillators (VCOs) is presented. With the admittance-transforming technique, the proposed VCO can operate at a frequency close to the f_max of the transistors while maintaining remarkable circuit performance in terms of phase noise, tuning range, and output power. Using a standard micrometer CMOS process, a U-band VCO is implemented for demonstration. The fabricated circuit exhibits a frequency tuning range of 1.1 GHz in the vicinity of 50 GHz. The measured output power and phase noise at 1-MHz offset are -11 dBm and -101 dBc/Hz, respectively. Operated at a supply voltage of 1.8 V, the VCO core consumes a DC power of 45 mW.     

CMOS Colpitts Quadrature VCO Using the Body Injection-Locked Coupling Technique

This paper presents a new low phase noise quadrature voltage-controlled oscillator (QVCO), which consists of two differential complementary Colpitts voltage-controlled oscillators (VCOs) with a tail inductor. The output of the tail inductor in one differential VCO is injected to the bodies of the nMOSFETs in the other differential VCO and vice versa. The proposed CMOS QVCO has been implemented with the TSMC 0.18 mum CMOS technology and the die area is 0.725 times 0.839 mm². At the supply voltage of 1.1 V, the total power consumption is 9.9 mW. The free-running frequency of the QVCO is tunable from 5.26 GHz to 5.477 GHz as the tuning voltage is varied from 0.0 V to 1.1 V. The measured phase noise at 1 MHz frequency offset is -124.36 dBc/Hz at the oscillation frequency of 5.44 GHz and the figure of merit (FOM) of the proposed QVCO is -189.1 dBc/Hz.     

Theoretical analysis of low phase noise design of CMOS VCO

A theoretical analysis on low phase noise of voltage-controlled oscillators (VCOs) based on complementary cross-coupled LC VCO by 0.35-/spl mu/m complementary metal oxide semiconductor technology is demonstrated. From the procedure of optimization steps, the excess noise factor of the amplifier coming from the active device has been determined. The proposed VCO operates at 2 GHz with phase noise of -116 dBc/Hz at offset frequency 600 kHz. The power consumption is 22.62 mW under 3 V bias with 9.1% frequency tuning. The achievement of low phase noise is also matched with prediction by formula in the frequency domain.