混网网络结构下最优入侵目标检测软件的设计与实现

传统网络入侵目标检测方法存在漏报率高和对不确定入侵数据检测性能弱的缺陷,无法胜任混网网络安全检测的需要。针对混网网络结构特征,设计并实现了最优入侵目标检测软件,该软件包括负载均衡模块、误用检测模块、匹配算法自适应模块,并采用多核网络处理器的多个同构核当成混网入侵检测引擎。通过自适应多模式匹配模型,基于混网网络的状态、特征动态对模式匹配算法进行动态调控,确保入侵目标检测引擎的利用率最大化。该匹配模型包括规范预操作过程、流量检测过程以及动态调控过程。给出了混网网络结构下的数据包多核处理过程以及匹配算法的优化代码。实验结果说明,所设计入侵检测软件可实现混网下入侵目标的有效检测,具有较高的检测性能。     

一种大容量模式匹配算法

模式匹配技术是入侵检测与信息监管等网络应用的重要手段。针对现有模式匹配算法在大规模模式集下无法支持高速处理的情况,提出了一种两级三态内容可寻址寄存器（TCAM）的模式匹配算法。利用TCAM特性,提出一种子串编码方法压缩表项空间,提高空间利用率。通过性能分析和实验仿真表明,算法在支持大容量模式库的同时,可以获得较高的搜索速率。     

字符串模式匹配算法的研究及改进

串的模式匹配是一种重要的串运算。本文首先对朴素的模式匹配BF算法与KMP算法进行了分析,在此基础上寻求出一种简单实用、易于理解的字符串模式匹配改进算法。结果表明改进算法能减少模式匹配中字符的比较次数和尝试次数,提高模式匹配的效率。     

基于TCAM的深部包检测技术研究与实现

深度包检测技术(DPI)已成为网络信息安全的研究重点。基于硬件实现模式匹配的DPI技术凭借其更强的处理能力受到广泛关注。本文提出一种基于TCAM模式匹配的方法实现DPI,规则表项按字节分别存储在TCAM(三态内容寻址存储器)中,输入字符按不同字节与TCAM中内容进行匹配,提高了DPI中模式匹配的处理速度。针对该技术功耗大的缺点,提出BF(Bloom Filter)和TCAM相结合的两级模式匹配技术,BF可将较少可疑包转发给TCAM处理模块,从而降低了系统功耗,大大提高了系统处理速度。     

基于Bloom filter的多模式匹配引擎

基于Bloom filter,结合位拆分状态机设计了一种适合硬件实现的多模式匹配引擎,由bloom filter过滤出可疑字符,位拆分状态机进行精确匹配.提出了过滤引擎和精确匹配引擎的流水线连接结构,通过增加分配器、缓存等硬件单元解决两引擎处理速度不匹配的问题,利用引擎的并行处理达到较高的吞吐性能.还通过设定规则长度等简化设计使引擎在保持高吞吐量的同时减小资源占用量,提高了可扩展性.     

多模式匹配算法研究和优化

模式匹配在网络安全领域有着重要的应用,随着网络环境的日益复杂,模式集合也随之增加.如何高效处理千万模式集下的字符串匹配成为网络安全的瓶颈之一.本文针对多模式匹配算法AC算法和WM算法进行了研究,采用了新型基于层次扫描和子节点数目搜索的双数组AC算法;从hash函数的选取和模式串的Tree树存储对WM算法进行了优化.能有效减少系统的内存占用,提高匹配效率.     

一种高性能硬件加密引擎阵列架构

该文提出一种高性能硬件加密引擎阵列架构,为大数据应用提供了先进的安全解决方案。该模块架构包括一个高速接口、一个中央管理和监视模块(CMMM)、一组多通道驱动加密引擎阵列,其中CMMM将任务分配给加密引擎,经由专用算法处理后再将数据传回主机。由于接口吞吐量和加密引擎阵列规模会限制模块性能,针对PCIe高速接口,采用MMC/eMMC总线连接构建阵列,发现更多加密引擎集成到系统后,模块性能将会得到提升。为验证该架构,使用55 nm制程工艺完成了一个PCIe Gen2×4接口的ASIC加密卡,测试结果显示其平均吞吐量高达419.23 MB。     

一种高性能内容过滤网关的设计与实现

采用NetGraph内核组件,基于UNIX的V流思想,设计实现了一个高性能的内容过滤网关.网关的数据包捕获框架是由一系列NetGraph节点连接而成的有向图,数据包沿着边可以在不同的节点间进行流动,通过零拷贝技术完成在系统内核空间的报文捕获.内容检查模块采用了改进的AC多模式匹配算法,提高了数据包关键词的检查速度和系统的性能.     

OpenSSL引擎机制的研究

传统情况下,在SSL中使用高强度算法的硬件加密设备,需要做大量的接口修改工作,并要求开发者熟悉硬件的内部结构和相应的开发接口。OpenSSL的引擎机制通过提供通用的加密接口解决了这个难题。文中介绍了OpenSSL引擎机制的实现原理,分析了OpenSSL引擎机制的关键技术,在此基础上,给出了硬件引擎实现的通用方法。基于该方法,可以方便地在SSL协议中引入所需的硬件加密模块,提高数据加密通道的安全性和处理性能。     

颜色空间转换的硬件设计与实现

针对GB和YUV格式数据在数字媒体中的重要性及YCrCb格式易(守数)处理的特点给出了颜色空间转换模块的一种硬件设计与实现.其中重点分析了RGB模式处理器和RGBtoYCrCb转换模块的设计.实验结果表明该颜色空间转换模块可以应用于图形引擎或视频设计中.     

Fixed Homography–Based Real‐Time SW/HW Image Stitching Engine for Motor Vehicles

In this paper, we propose an efficient architecture for a real‐time image stitching engine for vision SoCs found in motor vehicles. To enlarge the obstacle‐detection distance and area for safety, we adopt panoramic images from multiple telegraphic cameras. We propose a stitching method based on a fixed homography that is educed from the initial frame of a video sequence and is used to warp all input images without regeneration. Because the fixed homography is generated only once at the initial state, we can calculate it using SW to reduce HW costs. The proposed warping HW engine is based on a linear transform of the pixel positions of warped images and can reduce the computational complexity by 90% or more as compared to a conventional method. A dual‐core SW/HW image stitching engine is applied to stitching input frames in parallel to improve the performance by 70% or more as compared to a single‐core engine operation. In addition, a dual‐core structure is used to detect a failure in state machines using rock‐step logic to satisfy the ISO26262 standard. The dual‐core SW/HW image stitching engine is fabricated in SoC with 254,968 gate counts using Global Foundry's 65 nm CMOS process. The single‐core engine can make panoramic images from three YCbCr 4:2:0 formatted VGA images at 44 frames per second and frequency of 200 MHz without an LCD display.     

Squashing code size in microcoded IPs while delivering high decompression speed

Microcoded customized IPs offer superior performance and direct programmability of micro-architectural structures compared to instruction-based processors, yet at the cost of drastically enlarged code sizes. Code compression can deliver size reductions but necessitates attention to performance issues, so that the performance benefits of microcoded IPs are not squandered in the process. To attain this goal, we propose in this paper a fast code compression technique through exploiting the fact that the microcodes contain a sizable amount of unspecified bits. Although the values and the positions of the specified bits are highly irregular, the proposed technique can still flexibly and precisely fill in these fully specified bits through utilizing a linear network. The linear property inherent in the compression strategy in turn enables the development of an extremely low-overhead decompression engine. At runtime, the decompressed code can be generated in such a way that all the specified bits can be filled as required by a fixed-bandwidth XOR network. The combination of the proposed flexible XOR-based network with a minimum two-level storage for highly specified fields, such as immediate values, offers utmost code compression, attained within a negligible amount of performance and hardware overhead.     

某涡扇发动机战伤对性能影响仿真研究

针对某涡扇发动机战伤对发动机性能影响,提出了某涡扇发动机战时破孔损伤对发动机推力、耗油率等性能参数影响的定量计算方法。在分析某涡扇发动机部件气动热力过程、战伤程度与发动机截面参数关系的基础上,建立了某涡扇发动机战伤对性能影响的部件级非线性仿真模型。对某型飞机飞行包线内典型飞行状态的仿真实验结果表明,该涡扇发动机战伤模型能有效地分析发动机战伤程度对发动机性能参数的影响力,而且随着破孔损伤尺寸的增大,发动机耗油率将增大、推力将减小,损伤尺寸对性能参数的影响是一个非线性关系。     

Development of a new fully flexible hydraulic variable valve actuation system for engines using rotary spool valves

In this paper, a new hydraulic variable valve actuation (VVA) system is proposed and designed. The VVA system can significantly improve the engine performance in terms of the power density, volumetric efficiency, emission, and fuel consumption. In this system, each engine valve is actuated by a hydraulic cylinder which is charged and discharged using two rotary spool valves. The rotary spool valves are rotated by the engine crankshaft while their phases are controlled by hydraulic or electric phase shifters. Similar to camless valvetrains, the new engine valve system is capable of flexible engine valve timing and lift at any engine speed without the drawbacks of existing camless valvetrains including high control complexity, low reliability, and slow actuator response. The mathematical model of the system is derived and verified by comparing simulation and experimental results. Two feedback controllers are designed and implemented for precise valve opening and closing timing and valve lift control. Experiments are performed to validate the mathematical model and evaluate the proposed system's performance. The results show excellent system repeatability and controllability at different operating conditions.     

基于激光冲击的航空发动机风扇性能优化设计

航空发动机风扇性能是整个发动系统的核心,为了优化航空发动机的性能,提出一种基于激光冲击的航空发动机风扇性能优化系统设计方案。系统采用嵌入式设计技术,采用激光冲击技术进行航空发动机风扇性能相关参数检测,进行航空发动机风扇智能控制算法设计。结合传感器分布式检测技术进行航空发动机风扇转动状态测试,对航空发动机风扇性能优化系统的模块设计包括AD模块、智能信息处理模块、集成控制模块、激光冲击时钟控制模块、中断模块以及复位模块组成,采用激光冲击进行发动机风扇性能的智能监测和状态模式识别,结合ADSP-BF537进行发动机风扇性能检测的数据分析和智能控制,实现系统硬件设计。测试结果表明,设计的航空发动机风扇性能优化系统能实时监测风扇状态特征,提高对发动机风扇的远程智能控制能力。     

Is Search Really Necessary to Generate High-Performance BLAS?

A key step in program optimization is the estimation of optimal values for parameters such as tile sizes and loop unrolling factors. Traditional compilers use simple analytical models to compute these values. In contrast, library generators like ATLAS use global search over the space of parameter values by generating programs with many different combinations of parameter values, and running them on the actual hardware to determine which values give the best performance. It is widely believed that traditional model-driven optimization cannot compete with search-based empirical optimization because tractable analytical models cannot capture all the complexities of modern high-performance architectures, but few quantitative comparisons have been done to date. To make such a comparison, we replaced the global search engine in ATLAS with a model-driven optimization engine and measured the relative performance of the code produced by the two systems on a variety of architectures. Since both systems use the same code generator, any differences in the performance of the code produced by the two systems can come only from differences in optimization parameter values. Our experiments show that model-driven optimization can be surprisingly effective and can generate code with performance comparable to that of code generated by ATLAS using global search.     

DESIGN AND EVALUATION OF A PIPELINED FORWARDING ENGINE

Recent advances in broadband technology have caused forwarding engines to handle pack- ets with over 10 gigabit per second. In this paper, we present a high-speed forwarding pipeline which can finish all of the routing and forwarding tasks in the way of pipelining. We also establish the analysis model of the pipeline with which one can evaluate some key performance parameters of the forwarding engine such as forwarding rate and forwarding delay. We find that the pipeline is of good scalability and can forward unicast packets up to the speed of 40Gbit/s.     

基于CCP协议的发动机电控单元匹配标定

为了研究对发动机电控单元的匹配标定,本文介绍了符合匹配标定标准化组织（ASAP）标准的CCP协议,对协议的核心内容和协议开发的流程进行了较为深入的剖析.阐述了如何实现CCP驱动与CAN驱动的接口程序,讨论了利用CANape对发动机电控单元进行基于CCP协议标定的实现方法.使用CANape能够缩短开发周期,快速准确地进行汽车发动机电子控制单元的匹配标定,并在实际开发应用的过程中达到了预期效果,使发动机综合性能得到提高.     

Vehicle Stability Enhancement of Four-Wheel-Drive Hybrid Electric Vehicle Using Rear Motor Control

A vehicle stability enhancement control algorithm for a four-wheel-drive hybrid electric vehicle (HEV) is proposed using rear motor driving, regenerative braking control, and electrohydraulic brake (EHB) control. A fuzzy-rule-based control algorithm is proposed, which generates the direct yaw moment to compensate for the errors of the sideslip angle and yaw rate. Performance of the vehicle stability control algorithm is evaluated using ADAMS and MATLAB Simulink cosimulations. HEV chassis elements such as the tires, suspension system, and steering system are modeled to describe the vehicle's dynamic behavior in more detail using ADAMS, whereas HEV power train elements such as the engine, motor, battery, and transmission are modeled using MATLAB Simulink with the control algorithm. It is found from the simulation results that the driving and regenerative braking at the rear motor is able to provide improved stability. In addition, better performance can be achieved by applying the driving and regenerative braking control, as well as EHB control.     

Optimal chip-package codesign for high-performance DSP

In high-performance DSP systems, the memory bandwidth can be improved using high-density interconnect technology and appropriate memory mapping. High-density MCM and flip-chip solder bump technology is used to achieve a system with an I/O bandwidth of 100 Gb/s/cm2 die. The use of DRAMs in these systems usually make the performance of these systems poor, and some algorithms make it difficult to fully utilize the available memory bandwidth. This paper presents the design of a fast Fourier transform (FFT) engine that gives SRAM-like performance in a DRAM-based system. It uses almost 100% of the available burst-mode memory bandwidth. This FFT engine can compute a million-point FFT in 1.31 ms at a sustained computation rate of 8.64 /spl times/ 10/sup 10/ floating-point operations per second (FLOPS). This is at least an order of magnitude better than conventional systems.