共查询到18条相似文献,搜索用时 140 毫秒
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本文给出(n,6,m)(m6)等重等距码的一种构造方法,侧重讨论了(n,6,m)等重等距码的基本结构形式,设计了几类可以用来构造(n,6,m)等重等距码的基本单元子块,并分析了构造原则和实现结果,以及置换个数和性能分析。 相似文献
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极大等重等距码的结构分析 总被引:14,自引:1,他引:13
本文是文献[1]的继续,首次解决了(非线性)极大等重等距码(n,2,m)和(n,4,m)的等价分类问题,从而清晰地揭示了其结构特征.文中还提出了一些有待进一步研究的问题. 相似文献
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研究了二元等距码、等重等距码及其距离分布的Q-变换。通过使用Q-变换分布的性质,研究了二元等距码和等重等距码的最大码字数并得到2个新的上界,这些上界在某些情况下优于已知的结果。 相似文献
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本文给出(n,6,m)(m≥6)等重等距码的一种构造方法,侧重讨论了(n,6,m)等重等距码的基本结构形式,设计了几类可以用来构造(n,6,m)等重等距的基本单元子块,并分析了构造原则和实现结果,以及转换个数和性能分析。 相似文献
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设Qq(n,d)代表码长为n、任意两个不同码字间的Hamming距离为d的q元等距码所能达到的最大可能码字数(不考虑码的重量);Eq(n,d,w)代表码长为n、任意两个不同码字间Ham-ming距离为d、每个码字重量为w的q元等距等重码所能达到的最大可能码字数量.设q,n,d,w∈N,获得当q>2时,有①Eq(n,d,w)≤qn,②Qq(n,d)≤qn+1;当q=2时,则有③Eq(n,d,w)≤n,④Qq(n,d)≤n+1. 相似文献
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等距码的对偶距离分布及其性质 总被引:5,自引:2,他引:3
本文主要讨论了等距码的对偶距离分布及其性质,然后利用这些性质将[1]中的某些结果推广到q元等距码情形,并得到了其对偶距离分布的递推关系式,最后,本文给出了q元等距码的码字数目的一个上界。 相似文献
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MacWilliams恒等式是研究线性码及其对偶码的码字重量分布的一个非常有用的工具,而码字的重量分布的研究是编码研究中一个非常重要的研究方向.本文定义了环Z4+uZ4上长度为n的线性码的m-层李重量计数器,给出了环Z4+uZ4上长度为n的线性码关于李重量的一类MacWilliams恒等式.证明了该等式是生成矩阵在环Z4+uZ4上的环GR(4,m)+uGR(4,m)上线性码关于李重量的MacWilliams恒等式.进一步,利用Krawtchouk多项式,获得了环Z4+uZ4上长度为n的线性码的等价形式MacWilliams恒等式. 相似文献
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介绍了等重对称、非对称和可变重对称、非对称光正交码的定义、容量的上界及求码的自相关函数和互相关函数的差分矩阵法,并对几种光正交码的容量进行了比较,对光正交码构造方法进行了讨论。 相似文献
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Xin-Mei Wang Yi-Xian Yang 《Communications, IEEE Transactions on》1994,42(7):2390-2394
The undetected error probability (UEP) of binary (n, 2δ, m) nonlinear constant weight codes over the binary symmetric channel (BSC) is investigated, where n is the blocklength, m is the weight of codeword and 2δ is the minimum distance of the codes. The distance distribution of the (n, 2, m) nonlinear constant weight codes is evaluated. It is proven in this paper that the (5, 2, 2) code, (5, 2, 3) code, (6, 2, 3) code, (7, 2, 4) code, (7, 2, 3) code and (8, 2, 4) code are the only proper error-detecting codes in the (n, 2, m) nonlinear constant weight codes for n⩾5, in the sense that their UEP is increased monotonically with the channel error rate p, of course all these proper codes are m-out-of-n codes. Furthermore, it is conjectured that except for the cases of n⩽4δ, there are no proper error-detecting binary (n, 2δ, m) nonlinear constant weight codes, for n>8 and δ⩾1 相似文献
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In this paper, we investigate and compare the asymptotic performance of concatenated convolutional coding schemes over GF(4) over additive white Gaussian noise (AWGN) channels. Both parallel concatenated codes (PCC) and serial concatenated codes (SCC) are considered. We construct such codes using optimal non‐binary convolutional codes where optimality is in the sense of achieving the largest minimum distance for a fixed number of encoder states. Code rates of the form k0/(k0 + 1) for k0=1, 8, and 64 are considered, which suite a wide spectrum of communications applications. For all of these code rates, we find the minimum distance and the corresponding multiplicity for both concatenated code systems. This is accomplished by feeding the encoder with all possible weight‐two and weight‐three input information patterns and monitoring, at the output of the encoder, the weight of the corresponding codewords and their multiplicity. Our analytical results indicate that the SCC codes considerably outperform their counterpart PCC codes at a much lower complexity. Inspired by the superiority of SCC codes, we also discuss a mathematical approach for analysing such codes, leading to a more comprehensive analysis and allowing for further improvement in performance by giving insights on designing a proper interleaver that is capable of eliminating the dominant error patterns. Copyright © 2004 John Wiley & Sons, Ltd. 相似文献
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Jorge Pérez‐Chamorro Cyril Lahuec Fabrice Seguin Gérald Le Mestre Michel Jézéquel 《ETRI Journal》2009,31(5):585-592
This paper presents a method for decoding high minimal distance (dmin) short codes, termed Cortex codes. These codes are systematic block codes of rate 1/2 and can have higher dmin than turbo codes. Despite this characteristic, these codes have been impossible to decode with good performance because, to reach high dmin, several encoding stages are connected through interleavers. This generates a large number of hidden variables and increases the complexity of the scheduling and initialization. However, the structure of the encoder is well suited for analog decoding. A proof‐of‐concept Cortex decoder for the (8, 4, 4) Hamming code is implemented in subthreshold 0.25‐μm CMOS. It outperforms an equivalent LDPC‐like decoder by 1 dB at BER=10?5 and is 44 percent smaller and consumes 28 percent less energy per decoded bit. 相似文献
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高码率LDPC码译码器的优化设计与实现 总被引:1,自引:0,他引:1
本文以CCSDS推荐的7/8码率LDPC码为例,提出了一种适于高码率LDPC码译码器的硬件结构优化方法。高码率的LDPC码通常也伴随着行重与列重的比例较高的问题。本方法是在拆分校验矩阵的基础上,优化常用的部分并行译码结构,降低了高码率LDPC码译码时存在的校验节点运算单元(CNU)与变量节点运算单元(VNU)之间的复杂度不平衡,并由此提高了译码器的时钟性能。实验证明,本文方案提供的结构与常用的部分并行译码结构相比,节省硬件资源为41%;采用与本文方案相同的硬件资源而未经矩阵拆分的部分并行译码方案的码速率为本文方案的75%。 相似文献
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