直流数控可调稳压电源的设计

采用AT89C51单片机作为数控模块核心,以通过按键调节可输出0～18 V连续可调电压,电压调节分粗调与细调,粗调步进电压为1V,细调步进电压为0.05 V,液晶屏显示输出电压.稳压输出电路含过流检测电路,通过中断实现软件过流保护和报警.测试结果表明,该电源满足设计要求,可用于实验教学和工程应用中.     

高精度线性直流稳压电源1502D

本文介绍高精度线性直流稳压电源1502D,它为 220V交流输入, 0~15.0V/2.00A直流稳压输出,配以粗调、细调两只电位器精细调整,并采用截止式保护电路,保护电流从0.6~2.0A连续可调,具有防止瞬间大电流保护功能。该电源还专为手机及无线电维修设计了五种固定电压输出挡位,即1.5、3.6     

基于数字电子技术的数控直流稳压电源的设计

本文基于数字电子技术设计出一种数控直流稳压电源.该电源通过拨码开关、按键操作,实现输出电压的预置、递增或递减步进调节,步进电压精度为0.1V,电压调节范围为0-9.9V,通过数码管直观显示输出电压值.     

用单片机制作的直流稳压可调电源

传统的直流稳压电源输出电压是通过粗调波段开关及细调电位器来调节的,并由电压表指示电压值的大小.这种直流稳压电源存在读数不直观、电位器易磨损、稳压精度不高、不易调准、电路构成复杂、体积大等缺点,而基于单片机控制的直流稳压电源能较好地解决了以上问题.     

一种高精度高稳定性的片内振荡电路设计

作为系统时钟源,振荡电路的频率特性会影响芯片工作性能。为提高片内振荡器输出时钟的精度及稳定性,设计一种基于RC结构的振荡电路。该振荡电路采用带隙基准产生电容充电电流及基准电压,通过调整镜像管比例进行频率粗调校正,通过调整基准电压大小和温度系数以实现频率细调校正及温度特性校正。电路基于55 nm CMOS工艺设计实现,仿真结果表明,典型条件下电路工作输出为30 MHz,50%占空比时钟,在1.6～5.5 V、-40～125℃工作范围内,振荡频率偏移位0.6%以内,中心校准精度为0.5%,可作为片内高精度时钟源或参考时钟。     

DC/DC变换电路的仿真研究

该文阐述了直流斩波电路(Buck电路和Cuk电路)的电路结构和工作原理,并利用Multisim进行了电路的仿真。首先运Multisim画出Buck电路和Cuk电路的仿真原理图,并设置了采集输出电压的电压表和电流表和示波器,然后分别分析电力MOSFET在导通和关闭时的电路工作状态,电流流经路径,以此推导Buck电路和Cuk电路的输入电压与输出电压关系,要实现降压,Buck电路的占空比α调节范围0～1之间,Cuk电路的占空比α调节范围0～50%。然后使用画出的原理图进行仿真电路的工作波形,使用24V的直流输入电压,得到12V的直流输出电压,Buck电路的占空比设置为50%,通过仿真结果分析得出Buck电路的输出电压是11,768V,Cuk电路占空比33.3%,输出电压为-12.2V,与分析的输出电压极性与输出电压极性相反,数值是正确的,且要求的误差小于5%。通过调节Buck电路和Cuk电路的占空比可以将输入直流电压斩波变换为输出电压不等的电压值。     

负三十伏至正三十伏稳压电源

这里介绍一个双电源可调稳压电路,它能在-30～ 30V 内提供1A 的输出电流,并且具有输出短路保护功能。电路如图所示,电路中使用的电位器 VR1～VR6是三只双连电位器,输出电压由 VR3和VR4粗调、VR1和 VR2细调,VR5和VR6的作用是限流。如果将两个输出端短路,T5和 T6将会导通,使得 T1、T3和T2、T4截止,从而供电被切断。     

便捷式数控电源的设计与制作

设计了一种简易数控电源,电路包括电压设置按键、计数脉冲产生电路、计数电路、D/A转换电路和稳压电路五部分电路组成,本电路电压输出稳定,电压变化范围在0～12.7V,步进为0.05V。经测试,此输出电压稳定性好并且精度较高,操作方便快捷,人机界面友好,具有较高的实用性。     

开关型电压调节器MIC4680及其应用电路

MIC4680是Micrel公司推出的一种新型开关型电压调节器。它在4－34V的输入电压范围内能输出稳定的固定或要调输出电压。可广泛应用于电源调节卡、正负电压转换器、电池充电以及能驱动外部FET的高电路输出调节系统中。文中介绍了它的主要特点、引脚功能、主要参数和可调输出时的典型电路及设计方法。最后给出了由MIC4680构成的手机电池充电电路和将正＋12V转换成－12V输出的正、负电压转换器等实际电路。     

基于0.18μm CMOS工艺的低温漂低功耗延时电路

基于0.18μm CMOS工艺设计了一款低温漂延时电路,适用于不能使用锁相环电路又对信号传输精度有要求的低功耗传感检测应用。采用正温度系数的偏置电压,通过电流镜为延时电路提供一个正温度系数的偏置电流,利用偏置电流约束电路的延时温漂,实现温漂粗调。采用数字时间转换器,通过外部输入配置,对粗调后的延时进行动态细调,使得延时电路具有更高的动态稳定性和更低的温漂特性。电路测试结果表明,在3.3 V的电源电压下,-55～125℃内延时电路的温度系数为125×10^-6/℃,静态功耗仅为0.72 mW。     

Design of adaptive supply voltage for sub-threshold logic based on sub-1 V bandgap reference circuit

This paper presents the design methodology to produce an adaptive supply voltage, which is used to drive digital sub-threshold logic system. Design guidelines to maintain constant speed and power via adaptive V_DD regulation are presented first. Then the paper discusses modification of sub-1 V bandgap reference (BGR) circuits using dynamic threshold MOSFET technique to provide the necessary adaptive reference voltage. Another well-known sub-1 V BGR circuit using current mode technique is also fabricated and compared. Both circuits are implemented in CMOS 0.18 μm technology. Empirical data from SPICE simulation and first order approximation techniques are used to derive analytical design models used inside BGR circuit. Measurement results of both the fabricated circuits show reference voltage output of 500 mV range; which are in good match of SPICE simulation.     

High-Voltage Analog System for a Mobile NAND Flash

High-voltage analog circuits, including a novel high-voltage regulation scheme, are presented with emphasis on low supply voltage, low power consumption, low area overhead, and low noise, which are key design metrics for implementing NAND Flash memory in a mobile handset. Regulated high voltage generation at low supply voltage is achieved with optimized oscillator, high-voltage charge pump, and voltage regulator circuits. We developed a design methodology for a high-voltage charge pump to minimize silicon area, noise, and power consumption of the circuit without degrading the high-voltage output drive capability. Novel circuit techniques are proposed for low supply voltage operation. Both the oscillator and the regulator circuits achieve 1.5 V operation, while the regulator includes a ripple suppression circuit that is simple and robust. Through the paper, theoretical analysis of the proposed circuits is provided along with Spice simulations. A mobile NAND Flash device is realized with an advanced 63 nm technology to verify the operation of the proposed circuits. Extensive measurements show agreement with the results predicted by both analysis and simulation.     

A programmable multi-output technique in LDO regulator for multi-reference SAR ADC application

A multi-output and high-precision output-tuning technique in a low-dropout regulator (LDO) for multi-reference low-power SAR ADC is proposed in this article. A programmable resistor string is utilised for multi-output, and a tuneable resistor ladder is introduced in the feedback network for high-precision LDO output control. The applicability and superiority of this proposed approach are verified by the design of a 65 nm CMOS LDO with programmable output. The design results show that the LDO output ranges from 0.4 to 1.2 V with 0.2 V/step, and the output voltage can be precisely tuned by 0.05 V/step within a range of 0.8–1.15 V. The line regulation of this LDO is about 0.27 mV/V. The multi-output ability enables the LDO to drive five light loads simultaneously, and the high-precision tuning ability can effectively overcome the output errors caused by power supply variation, temperature drift and other non-ideal factors.     

一款高精度低功耗电压基准的设计与实现

设计了一款高输出电压情况下的高精度低功耗电压基准电路.电路采用了比例采样负反馈结构达到较高和可控的输出电压,并利用曲率补偿电路极大地减小了输出电压的温度系数.针对较宽输入电压范围内的超低线性调整率规格,给出了多级带隙级联的电路结构.针对功耗和超低负载调整率的问题,电路采用了基于运算放大器的限流模式和内置大尺寸横向扩散金属氧化物半导体(LDMOS)晶体管的设计.该电路在CSMC 0.25 μm高压BCD工艺条件下进行设计、仿真和流片,测试结果表明,该电压基准输出电压为3.3V,温度系数为19.4×10-6/℃,线性调整率为5.6 μV/V,负载调整率为23.3 μV/V,工作电流为45 μA.     

Output buffer for +3.3 V applications in a 180 nm +1.8 V CMOS technology

A new output buffer realized with low-voltage (+1.8 V) devices to drive high voltage signals for +3.3 V interface, such as peripheral component interconnect extended (PCI-X) applications in a 180 nm CMOS process is proposed in this paper. As PCI-X is a +3.3 V interface, the high voltage gate–oxide stress poses a serious problem to design PCI-X I/O circuits in a 180 nm CMOS process. The performance of the proposed output buffer is examined using Cadence software and the model parameters of a 180 nm CMOS process. The experimental results have hither to confirm that the proposed output buffer can be successfully operated at 100 MHz frequency without suffering high voltage gate–oxide overstress in the +3.3Vinterface.Anew level converter realized with +1.8Vdevices that can convert 0/1Vvoltage swing to 0/3.3 V voltage swing is also presented in this paper. The simulation results have confirmed that the proposed level converter can be operated accurately without any voltage drop. The topology, however, reports low sensitivity and has features suitable for VLSI implementation. The proposed circuits are suited for low power design without performance degradation.     

用于低压差线性稳压器的输出精密微调设计技术

提出了一种用于低压差线性稳压器(LDO:Low-Dropout regulator)的输出精密微调方法,通过在反馈网络中引入可微调电阻梯实现对LDO输出的精密调整,并采取伪电阻保护的版图布局方式提高电阻梯的匹配性能。基于65 nm CMOS工艺对LDO进行了设计,整个LDO线性调整率约为0.05mV/V,输出电压在1.02V~1.36V范围内能够按照0.02V/step的最小步长进行精密微调,能有效减小由电源电压、温度等因素引起的输出误差,适合嵌入式片上系统(So C:System-on-Chip)的应用。     

Power management circuits for self-powered systems based on micro-scale solar energy harvesting

In this paper, two types of power management circuits for self-powered systems based on micro-scale solar energy harvesting are proposed. First, if a solar cell outputs a very low voltage, less than 0.5 V, as in miniature solar cells or monolithic integrated solar cells, such that it cannot directly power the load, a voltage booster is employed to step up the solar cell’s output voltage, and then a power management unit (PMU) delivers the boosted voltage to the load. Second, if the output voltage of a solar cell is enough to drive the load, the PMU directly supplies the load with solar energy. The proposed power management systems are designed and fabricated in a 0.18-μm complementary metal–oxide–semiconductor process, and their performances are compared and analysed through measurements.     

SK8050S特性及其实验研究

SK8050S是由Sanken公司生产的5V他励开关稳压芯片。详细介绍了SK8050S的电气特性并对其工作效率和稳压性等主要参数进行了实验研究。文中给出了具体的实验电路和测试方法，实验结果表明SK8050S在工作效率和稳压性方面远远超过目前通常使用的三端稳压器L7805，能够输出高达3A的电流且电压稳定在5V。效率可高达91％。     

嵌入式开关电容DC-DC变换器的新颖控制技术

提出了一种针对单片集成开关电容DC-DC变换器进行优化的设计方案.阐述了开关电容DC-DC变换器电路的拓扑结构及其基本工作原理,给出了单片集成开关电容DC-DC变换器的等效电阻控制方法.考虑到集成工艺的兼容性问题,在电路设计时,用n沟MOSFET替代二极管;为了改善变换器的输出特性,在标准2μm p阱双层多晶硅单层金属CMOS工艺中增加了一次MOSFET阈值电压的调整步骤,实现了升压开关电容DC-DC变换器的单片集成.芯片面积为0.4mm2,测试结果显示,在变换器输入电压为3V,输出电压为5V,电路开关频率为9.8MHz时,输出功率为0.63mW,效率达到68%.     

CMOS voltage references using lateral bipolar transistors

Two bandgap references are presented which make use of CMOS compatible lateral bipolar transistors. The circuits are designed to be insensitive to the low beta and alpha current gains of these devices. Their accuracy is not degraded by any amplifier offset. The first reference has an intrinsic low output impedance. Experimental results yield an output voltage which is constant within 2 mV, over the commercial temperature range (0 to 70/spl deg/C), when all the circuits of the same batch are trimmed at a single temperature. The load regulation is 3.5 /spl mu/V//spl mu/A, and the power supply rejection ratio (PSRR) at 100 Hz is 60 dB. Measurements on a second reference yield a PSRR of minimum 77 dB at 100 Hz. Temperature behaviour is identical to the first circuit presented. This circuit requires a supply voltage of only 1.7 V.