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1.
采用超高真空化学气相淀积系统,以高纯Si2 H6和GeH4作为生长气源,用低温缓冲层技术在Si(001)衬底上成功生长出厚的纯Ge外延层.对Si衬底上外延的纯Ge层用反射式高能电子衍射仪、原子力显微镜、X射线双晶衍射曲线和Ra-man谱进行了表征.结果表明在Si基上生长的约550nm厚的Ge外延层,表面粗糙度小于1nm,XRD双晶衍射曲线和Ra-man谱Ge-Ge模半高宽分别为530'和5.5cm-1,具有良好的结晶质量.位错腐蚀结果显示线位错密度小于5×105cm-2可用于制备Si基长波长集成光电探测器和Si基高速电子器件.  相似文献   

2.
采用超高真空化学气相淀积系统,以高纯Si2 H6和GeH4作为生长气源,用低温缓冲层技术在Si(001)衬底上成功生长出厚的纯Ge外延层.对Si衬底上外延的纯Ge层用反射式高能电子衍射仪、原子力显微镜、X射线双晶衍射曲线和Ra-man谱进行了表征.结果表明在Si基上生长的约550nm厚的Ge外延层,表面粗糙度小于1nm,XRD双晶衍射曲线和Ra-man谱Ge-Ge模半高宽分别为530'和5.5cm-1,具有良好的结晶质量.位错腐蚀结果显示线位错密度小于5×105cm-2可用于制备Si基长波长集成光电探测器和Si基高速电子器件.  相似文献   

3.
Si基外延Ge薄膜及退火对其特性的影响研究   总被引:2,自引:2,他引:0  
采用超高真空化学气相沉积(UHV-CVD)系统,用低温Ge缓冲层技术在Si衬底上外延了张应变Ge薄膜.扫描电镜(TEM)图表明Si基外延Ge薄膜拥有低的位错密度,原子力显微镜(AFM)测试Ge层表面粗糙度仅为1.2 nm.对Si基外延Ge薄膜进行了不同温度下的退火,并用双晶X射线衍射(DCXRD)曲线和Raman谱进行...  相似文献   

4.
随着Si基器件发展遇到瓶颈,具有更优异性能且与Si基CMOS工艺良好兼容的Ge基器件展现出了应用于集成电子与光电子领域的广阔前景.然而,Si基Ge器件性能会受制于Si与Ge之间较大的晶格失配所产生的高密度位错.因此,控制Si衬底上Ge外延薄膜的位错密度成为高性能Ge器件制备的研究重点.文章着重介绍了插入层、低温成核层和选区外延生长技术3种Si衬底上Ge外延薄膜位错控制技术的基本原理及研究进展,讨论了Si基Ge器件的最新研究进展,并展望了Si基Ge薄膜生长和器件制备的发展前景.  相似文献   

5.
用化学气相沉积方法,在Si(100)衬底上生长Si1xGex:C合金作为缓冲层,继而外延生长了Ge晶体薄膜.根据AES测量结果可以认为,缓冲层包括由衬底中的Si原子扩散至表面与GeH4,C2H4反应而生成的Si1-xGex:C外延层和由Si1-xGex:C外延层中Ge原子向衬底方向扩散而形成的Si1-xGex层.缓冲层上外延所得Ge晶体薄膜晶体取向较为单一,其厚度超过在Si上直接外延Ge薄膜的临界厚度,且薄膜中的电子迁移率与同等掺杂浓度(1.0×1019 cm-3)的体Ge材料的电子迁移率相当.  相似文献   

6.
用化学气相沉积方法,在Si(100)衬底上生长Si1xGex:C合金作为缓冲层,继而外延生长了Ge晶体薄膜.根据AES测量结果可以认为,缓冲层包括由衬底中的Si原子扩散至表面与GeH4,C2H4反应而生成的Si1-xGex:C外延层和由Si1-xGex:C外延层中Ge原子向衬底方向扩散而形成的Si1-xGex层.缓冲层上外延所得Ge晶体薄膜晶体取向较为单一,其厚度超过在Si上直接外延Ge薄膜的临界厚度,且薄膜中的电子迁移率与同等掺杂浓度(1.0×1019 cm-3)的体Ge材料的电子迁移率相当.  相似文献   

7.
用化学气相沉积方法,在Si(100)衬底上生长Si1-xGex∶C合金作为缓冲层,继而外延生长了Ge晶体薄膜. 根据AES测量结果可以认为,缓冲层包括由衬底中的Si原子扩散至表面与GeH4, C2H4反应而生成的Si1-xGex∶C外延层和由Si1-xGex∶C外延层中Ge原子向衬底方向扩散而形成的Si1-xGex层. 缓冲层上外延所得Ge晶体薄膜晶体取向较为单一,其厚度超过在Si上直接外延Ge薄膜的临界厚度,且薄膜中的电子迁移率与同等掺杂浓度(1.0E19cm-3)的体Ge材料的电子迁移率相当.  相似文献   

8.
用化学气相淀积方法,在Si(100)衬底上生长Si1-x Gex:C合金作为缓冲层、继而外延生长了Ge晶体薄膜,用X射线衍射(XRD)、俄歇电子能谱(AES)、拉曼(Raman)衍射光谱等对所得到的样品进行了表征测量,着重研究了Si1-x Gex:C缓冲层生长温度对样品结构特征的影响.结果表明:Si1-x Gex:C缓冲层中的Ge原子浓度沿表面至衬底方向逐渐降低,其平均组分随着生长温度的升高而降低.这与较高生长温度(760~820℃)所导致的原子扩散效应相关;在Si1-x Gex:C缓冲层上外延生长的Ge薄膜具有单一的晶体取向,薄膜的晶体质量随着温度的升高而降低.  相似文献   

9.
在Si(111)衬底上采用金属有机化合物化学气相沉积(MOCVD)技术外延生长GaN薄膜,对外延生长所得GaN薄膜的晶体结构和表面形貌进行表征,并研究SiNx插入层对GaN薄膜的晶体质量和表面形貌的影响.结果表明,在Si衬底上生长GaN薄膜过程中引入SiNx插入层可使GaN薄膜的(10-12)面的X-射线回摆曲线的半峰宽(FWHM)值从974.01减小到602.01arcsec;表面凹坑等缺陷减少、表面平整度提高.可见,SiNx插入层对在Si衬底上外延生长GaN薄膜的晶体质量和表面形貌有着重要的影响.  相似文献   

10.
超高真空化学气相生长用于应变硅的高质量SiGe缓冲层   总被引:4,自引:1,他引:3  
采用UHV/CVD技术,以多层SiGe/Si结构作为缓冲层来生长应变弛豫SiGe虚衬底,并在此基础上生长出了具有张应力的Si层.利用高分辨X射线、二次离子质谱仪和原子力显微镜分别对薄膜的晶体质量、厚度以及平整度进行了分析.结果表明,通过这种方法制备的SiGe虚衬底,不仅可以有效提高外延层中Ge含量,以达到器件设计需要,而且保证很好的晶体质量和平整的表面.Schimmel液腐蚀后观察到的位错密度只有1×106cm-2.  相似文献   

11.
报道了采用热壁外延(HWE)技术,在(100),(111)和(211)三种典型Si表面通过两步生长和直接生长法制备GaAs单晶薄膜,经过拉曼光谱、霍尔测试和荧光光谱分析比较,得出结论:(1)相同取向Si衬底,两步生长法制备的GaAs薄膜结晶质量比直接生长法制备的GaAs薄膜的要好;(2)采用HWE技术在Si上异质外延GaAs薄膜,其表面缓冲层的生长是降低位错、提高外延质量的基础;(3)不同取向Si衬底对GaAs外延层结晶质量有影响, (211)面外延的GaAs薄膜质量最好,(100)面次之,(111)面最差.  相似文献   

12.
Epitaxial (100) CdTe and ZnTe layers with high crystalline quality have been grown on Si substrates by atmospheric pressure organometallic vapor phase epitaxy (OMVPE). A thin Ge interfacial layer grown at low temperature was used as a buffer layer prior to ZnTe and CdTe growth. The layers were characterized by Nomarski optical microscopy and double crystal x-ray diffraction. Double crystal rocking curves with full width at half maximum of about 110 and 250 arc-sec have been obtained for a 7 μm thick ZnTe layer and a 4 μm thick CdTe layer, respectively. The results presented demonstrate a novel method ofin-situ Si cleaning step without a high temperature deoxidation process to grow high quality CdTe and ZnTe on Si in a single OMVPE reactor.  相似文献   

13.
We report the results of studies which have been made on heteroepitaxial layers of GaAs and AlGaAs grown by metalorganic chemical vapor deposition on composite substrates that consist of four different types of heteroepitaxial layered structures of Ge and Ge-Si grown by molecular beam epitaxy on (100)-oriented Si substrates. It is found that of the four structures studied, the preferred composite substrate is a single layer of Ge ∼1 μm thick grown directly on a Si buffer layer. The double-crystal X-ray rocking curves of 2 μm thick GaAs films grown on such substrates have FWHM values as small as 168 arc sec. Transmission electron micrographs of these Ge/Si composite substrates has shown that the number of dislocations in the Ge heteroepitaxial layer can be greatly reduced by an anneal at about 750° C for 30 min which is simultaneously carried out during the growth of the GaAs layer. The quality of the GaAs layers grown on these composite substrates can be greatly improved by the use of a five-period GaAs-GaAsP strained-layer superlattice (SLS). Using the results of these studies, low-threshold optically pumped AlGaAs-GaAs DH laser structures have been grown by MOCVD on MBE Ge/Si composite substrates.  相似文献   

14.
张翀  谢晶  谢泉 《半导体技术》2017,42(12):933-937,950
采用磁控溅射方法和热加工工艺在n型Si衬底上溅射不同厚度的MgO层并制备Fe-Si薄膜层,退火后形成Fe3Si/MgO/Si多层膜结构.利用MgO缓冲层对退火时Si衬底扩散原子进行屏蔽,并分析MgO层对Fe3Si薄膜结构和电学性质的影响.通过X射线衍射仪(XRD)、扫描电子显微镜(SEM)和四探针测试仪对Fe3Si薄膜的晶体结构、表面形貌、断面形貌和电阻率进行表征与分析.研究结果表明:当MgO层厚度为20 nm时生成Fe0.9Si0.1薄膜,当厚度为50,100,150和200 nm时都生成了Fe3Si薄膜,生成的Fe3Si和Fe0.9Si0.1薄膜以(110)和(211)取向为主.随MgO缓冲层厚度增加,Si衬底扩散原子对Fe3Si薄膜的影响减小,Fe3 Si薄膜的晶格常数逐渐减小,晶粒大小趋向均匀,平均电阻率呈现先增大后减小趋势.研究结果为后续基于Fe3 Si薄膜的器件设计与制备提供了参考.  相似文献   

15.
Alternate substrates for molecular beam epitaxy growth of HgCdTe including Si, Ge, and GaAs have been under development for more than a decade. MBE growth of HgCdTe on GaAs substrates was pioneered by Teledyne Imaging Sensors (TIS) in the 1980s. However, recent improvements in the layer crystal quality including improvements in both the CdTe buffer layer and the HgCdTe layer growth have resulted in GaAs emerging as a strong candidate for replacement of bulk CdZnTe substrates for certain infrared imaging applications. In this paper the current state of the art in CdTe and HgCdTe MBE growth on (211)B GaAs and (211) Si at TIS is reviewed. Recent improvements in the CdTe buffer layer quality (double crystal rocking curve full-width at half-maximum?≈?30?arcsec) with HgCdTe dislocation densities of ≤106?cm?2 are discussed and comparisons are made with historical HgCdTe on bulk CdZnTe and alternate substrate data at TIS. Material properties including the HgCdTe majority carrier mobility and dislocation density are presented as a function of the CdTe buffer layer quality.  相似文献   

16.
In this paper, we report on the growth of epitaxial Ge on a Si substrate by means of low-energy plasma-enhanced chemical vapor deposition (LEPECVD). A Si1?xGex graded buffer layer is used between the silicon substrate and the epitaxial Ge layer to reduce the threading dislocation density resulting from the lattice mismatch between Si and Ge. An advantage of the LEPECVD technique is the high growth rate achievable (on the order of 40 Å/sec), allowing thick SiGe graded buffer layers to be grown faster than by other epitaxial techniques and thereby increasing throughput in order to make such structures more manufacturable. We have achieved relaxed Ge on a silicon substrate with a threading dislocation density of 1 × 105 cm?2, which is 4?10x lower than previously reported results.  相似文献   

17.
成步文  李成  刘智  薛春来 《半导体学报》2016,37(8):081001-9
Si-based germanium is considered to be a promising platform for the integration of electronic and photonic devices due to its high carrier mobility, good optical properties, and compatibility with Si CMOS technology. However, some great challenges have to be confronted, such as: (1) the nature of indirect band gap of Ge; (2) the epitaxy of dislocation-free Ge layers on Si substrate; and (3) the immature technology for Ge devices. The aim of this paper is to give a review of the recent progress made in the field of epitaxy and optical properties of Ge heterostructures on Si substrate, as well as some key technologies on Ge devices. High crystal quality Ge epilayers, as well as Ge/SiGe multiple quantum wells with high Ge content, were successfully grown on Si substrate with a low-temperature Ge buffer layer. A local Ge condensation technique was proposed to prepare germanium-on-insulator (GOI) materials with high tensile strain for enhanced Ge direct band photoluminescence. The advances in formation of Ge n+p shallow junctions and the modulation of Schottky barrier height of metal/Ge contacts were a significant progress in Ge technology. Finally, the progress of Si-based Ge light emitters, photodetectors, and MOSFETs was briefly introduced. These results show that Si-based Ge heterostructure materials are promising for use in the next-generation of integrated circuits and optoelectronic circuits.  相似文献   

18.
Growing single‐crystal semiconductors directly on an amorphous substrate without epitaxy or wafer bonding has long been a significant fundamental challenge in materials science. Such technology is especially important for semiconductor devices that require cost‐effective, high‐throughput fabrication, including thin‐film solar cells and transistors on glass substrates as well as large‐scale active photonic circuits on Si using back‐end‐of‐line CMOS technology. This work demonstrates a CMOS‐compatible method of fabricating high‐quality germanium single crystals on amorphous silicon at low temperatures of <450 °C. Grain orientation selection by geometric confinement of polycrystalline germanium films selectively grown on amorphous silicon by chemical vapor deposition is presented, where the confinement selects the fast‐growing grains for extended growth and eventually leads to single crystalline material. Germanium crystals grown using this method exhibit (110) texture and twin‐mediated growth. A model of confined growth is developed to predict the optimal confining channel dimensions for consistent, single‐crystal growth. Germanium films grown from one‐dimensional confinement exhibit a 200% grain size increase at 1 μm film thickness compared to unconfined films, while 2D confinement growth achieved single crystal Ge. The area of single crystalline Ge on amorphous layers is only limited by the growth time. Significant enhancement in room temperature photoluminescence and reduction in residual carrier density have been achieved using confined growth, demonstrating excellent optoelectronic properties. This growth method is readily extensible to any materials system capable of selective non‐epitaxial deposition, thus allowing for the fabrication of devices from high‐quality single crystal material when only an amorphous substrate is available.  相似文献   

19.
We demonstrate enhancement of electron mobility in nMOSFET using an ultrathin pure Ge crystal channel layer directly grown on a bulk Si wafer. A thin Si crystal layer is also grown on top of a Ge crystal channel layer as a capping layer. Using the Si/Ge/Si structure, a maximum 2.2X enhancement in electron mobility is achieved while good gate dielectric properties and junction qualities of bulk Si devices are maintained.  相似文献   

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