硅基自锐式纳米针尖一次成型制作工艺的研究

对采用KOH溶液腐蚀单晶硅制备自锐式纳米针尖的一次成型制作工艺进行了研究,为提高自锐式纳米针尖的纵横比,根据各向异性腐蚀针尖的自锐效应模型,分析了腐蚀溶液的浓度及掩模形状对针尖形状的影响,得到了提高自锐式纳米针尖纵横比的条件,实验结果表明,在15 rnol/L,60℃的KOH腐蚀液中采用五边形掩模可获取纵横比约等于1,针尖曲率半径小于10 nm的自锐式纳米针尖,针尖侧壁由{113}晶面组成.     

含添加剂的各向异性腐蚀液中实现小掩膜下高硅尖的腐蚀

各向异性KOH溶液腐蚀硅尖具有简单、易于实现、成本低廉、(100)晶面腐蚀速率均匀等优点.然而在40%KOH溶液中削角速率和(100)晶面的腐蚀速率之比约为1.6~1.9,并且该比值随着KOH浓度的减小而增大.如此高的削角速率会给AFM探针的制作带来技术上的困难.而对腐蚀场发射器件和隧道式传感器的硅尖阵列来说,高的削角速率会减少单位面积内的硅尖数量.本文通过在氢氧化钾(KOH)或者四甲基氢氧化胺(TMAH)溶液中添加适当的添加剂(如异丙醇(IPA)、1,5戊二醇或碘)降低了削角速率,在较小直径的掩膜下腐蚀出高硅尖.实验结果还表明:在TMAH基腐蚀液中每个硅尖的八个快腐蚀面的削角速率几乎相等,硅尖直径偏差较KOH溶液中腐蚀的硅尖直径偏差更小,因此成品率得到了提高.     

用于X射线闪烁屏的硅微通道阵列整形技术

为制备用于X射线闪烁屏的高开口面积比硅微通道阵列,研究了四甲基氢氧化铵(TMAH)溶液温度和质量分数对硅(100)晶面和(110)晶面腐蚀速率的影响.通过金相显微镜观测硅微通道端面尺寸并计算腐蚀速率,分析了硅(100)晶面和(110)晶面腐蚀速率比对硅微通道阵列孔形的影响,探讨了TMAH溶液温度和质量分数与硅微通道阵列开口面积比的关系.研究表明,硅(100)晶面和(110)晶面的腐蚀速率比是影响硅微通道阵列开口面积比的主要因素.当硅(100)晶面与(110)晶面腐蚀速率比大于√2时,得到具有高开口面积比的正方形硅微通道阵列.使用质量分数为1％的TMAH溶液在40℃的溶液温度下,制备出开口面积比大于81％的正方形硅微通道阵列.通过高温填充CsI (TI)制备出基于硅微通道的X射线闪烁屏,X射线成像结果表明通道整形技术有助于提高闪烁屏的性能.     

考虑高指数晶面的体硅腐蚀模拟新CA模型

针对目前体硅腐蚀(硅各向异性腐蚀)的3D CA模型无法引入(211),(311),(331),(411)等较多高密勒指数晶面,模拟精度不高的问题,建立了一种高精度的体硅腐蚀模拟的新3D连续CA(元胞自动机)模型.模型可以有效引入(211),(311),(331),(411)等高密勒指数晶面,提高模拟精度.模拟结果与实验结果一致,证明了模型的模拟效果,对体硅腐蚀模拟研究和提高MEMS设计水平具有一定的实用意义.     

考虑高指数晶面的体硅腐蚀模拟新CA模型

针对目前体硅腐蚀(硅各向异性腐蚀)的3D CA模型无法引入(211),(311),(331),(411)等较多高密勒指数晶面,模拟精度不高的问题,建立了一种高精度的体硅腐蚀模拟的新3D连续CA(元胞自动机)模型.模型可以有效引入(211),(311),(331),(411)等高密勒指数晶面,提高模拟精度.模拟结果与实验结果一致,证明了模型的模拟效果,对体硅腐蚀模拟研究和提高MEMS设计水平具有一定的实用意义.     

水热反应条件对BaTiO3纳米晶形成的影响及其原子尺度表面结构

本文报道了水热反应条件对BaTiO3纳米晶形成的影响,尤其是其原子尺度的表面结构。研究结果表明,Ba/Ti摩尔比较大的前驱体溶液中,易获得立方状大尺寸（～260nm）的BaTiO3纳米晶体;而采用乙二醇作为水热反应介质,可获得小尺寸弱圉聚的BaTiO3纳米晶（与纯水溶液或水-乙二醇的混合液相比较）。立方状或长方体状的BaTiO3纳米晶外表面被{100}晶面所包围,{110}晶面条纹与纳米晶体的边界相交呈45°角。在粗糙的BaTiO3纳米晶表面,常可观察到台面台阶扭折（terrace—ledge—kink）的表面结构,台面（terrace）和台阶（1edge）位于{100}晶面。由于表面结构的重构,{110}晶面通常被分解成由许多小的{100}晶面相连接而成的扭折结构。而在球状的BaTiO3纳米晶边缘,没有观察到表面台阶结构。     

碘过饱和KOH溶液对硅(110)晶面腐蚀的改善

将非金属元素碘作为硅的KOH腐蚀液的添加物,在对(100)和(110)单晶硅片的各向异性腐蚀中,获得了更为丰富的异向腐蚀特性和更为光滑的腐蚀表面。当温度在95℃,KOH腐蚀液中碘的摩尔比为0.5时,得到了粗糙度均小于10nm的Si-(100)和(110)光洁表面,两晶面的腐蚀速率均为1.4μm/min。这两晶面在相同的条件下同时达到最佳光洁度,说明腐蚀速率是获得高光洁度表面的关键。实验还证明碘在热碱溶液中的稳定性和持久性要高于现在已被大量研究的双氧水和过硫等,尤其是对硅(110)表面光洁度的改善具有积极的促进作用。     

KOH溶液中(11O)硅片腐蚀特性的研究

研究了在KOH溶液中(110)硅片的腐蚀特性,在保证(110)面的平整和{111}面的光滑的腐蚀实验条件下,利用(110)面和{111}面腐蚀选择比大,采用湿法腐蚀技术可以制作高深宽比结构的方式,在(110)硅片上设计制作出光开关用微反射镜.在腐蚀过程中光开关悬臂的凸角处产生了削角现象,利用表面硅原子悬挂键的分布特征对产生削角的原因作了合理解释,这为以后研究凸角补偿提供了理论依据.     

利用电子束光刻制备晶面依赖的硅纳米结构

利用电子束光刻和各向异性湿法腐蚀技术,在(100)SOI衬底上成功地制备出晶面依赖的硅纳米结构.这项技术利用了硅的不同晶面在碱性腐蚀溶液中具有不同腐蚀速率的特性.纳米结构脊部宽度的最小尺寸可以达到10nm以下.扫描电镜和原子力显微镜的观察表明,利用这种方法制备出来的纳米结构具有很好的重复性,而且表面光滑.     

利用电子束光刻制备晶面依赖的硅纳米结构

利用电子束光刻和各向异性湿法腐蚀技术,在(100)SOI衬底上成功地制备出晶面依赖的硅纳米结构.这项技术利用了硅的不同晶面在碱性腐蚀溶液中具有不同腐蚀速率的特性.纳米结构脊部宽度的最小尺寸可以达到10nm以下.扫描电镜和原子力显微镜的观察表明,利用这种方法制备出来的纳米结构具有很好的重复性,而且表面光滑.     

Application of silicon crystal orientation and anisotropic effects to the control of charge spreading in devices

Advantageous use of the silicon, diamond cubic crystal structure is described from the aspect of orientation-dependent etching. The use of this technology can affect device characteristics, device and circuit isolation, circuit element densities, and process control. Several laboratories have reported advantageous use of }100{ oriented silicon. This paper discusses the advantageous use of both {100} and {110} silicon orientations. In particular, the {110} technology is discussed from a high packing density aspect as applied to the processing and characteristics of silicon diode array targets with improved television blooming control.     

The influence of crystal orientation on silicon semiconductor processing

Silicon crystallographic orientation effects on semiconductor processing from single crystal growth through completed devices or circuits have been studied. The preferred octahedral crystal habit of silicon provides for stable crystal growth on the {111} plane, but the other low-index planes, {110} and {100}, are becoming more commonly used, in spite of greater difficulty in growth and processing of these crystals. Chemical and physical properties such as etch rates and Young's modulus are affected by orientation. The effect of crystal orientation on technologies such as diffusion under film (DUF), dielectric isolation, epitaxy, selective etch and epitaxial refill, and simultaneous deposition of single crystal and polycrystal silicon are presented. In addition, orientation effects on processes of oxidation, diffusion, alloying, and scribing are discussed.     

Mass Synthesis of Large,Single‐Crystal Au Nanosheets Based on a Polyol Process

Single‐crystal gold nanosheets, with triangular, hexagonal, or truncated triangular shapes, from several to tens of micrometers across and tens of nanometers thick, have been successfully synthesized in high yield via a simple and low‐cost chemical route in an ethylene glycol solution, on the basis of a polyol process. The planar surfaces of the Au nanosheets are atomically flat and correspond to {111} planes; the lateral surfaces are {110} planes. The nanosheets show strong optical absorption in the near infrared region of the electromagnetic spectrum. Both the ethylene glycol and the surfactant polyvinylpyrrolidone (PVP), in the solution play important roles in the formation of the Au nanosheets. The concentrations of the precursors (PVP, HAuCl₄) and the reaction temperature are also crucial to the morphology and size of the final product. The formation of such large, single‐crystal nanosheets is explained by the preferential adsorption of some species of molecules from the solution onto the {111} planes of Au nuclei, and the connection of small, triangular nanosheets. These nanosheets could be used easily, for example, in gas sensors, in the fabrication of nanodevices and substrate materials, in property studies, and also for inducing hypothermia in tumors.     

A simple method for high yield fabrication of sharp silicon tips

A simple, high yield, method for the fabrication of sharp silicon tips is described. A triangular etch mask design is used to ensure that the tip forms with a single point. An anisotropic wet etch gives rise to a tip that continues to “self-sharpen” after the etch mask is released. The tip geometry comprises three converging {1 1 3} planes towards the apex with {3 1 3} planes forming at the base. The apex of each tip typically has a radius of curvature of <5 nm, which can be reduced to <2 nm by a subsequent oxide sharpening process. Tips of this kind have been successfully integrated into the fabrication of atomic force microscopy probes.     

微反射镜和光纤自对准V型槽的制作

用纯KOH水溶液和KOH +IPA混合水溶液在 ( 1 0 0 )硅片上沿 <1 0 0 >方向上腐蚀所暴露的平面是不同的。纯KOH水溶液中总是能暴露与衬底垂直的 {1 0 0 }面 ,在KOH +IPA溶液中 ,随着KOH的浓度不同将暴露 {1 1 0 }和 {1 0 0 }面。使用KOH浓度为 50 %的KOH +IPA溶液 ,在 ( 1 0 0 )硅片上一次掩模制作微反射镜和光纤自对准V型槽 ,微镜的表面粗糙度低于 1 0nm。     

Facet‐Dependent,Fast Response,and Broadband Photodetector Based on Highly Stable All‐Inorganic CsCu2I3 Single Crystal with 1D Electronic Structure

Low‐dimensional metal halides at molecular level, which feature strong quantum confinement effects from intrinsic structure, are emerging as ideal candidates in optoelectronic fields. However, developing stable and nontoxic metal halides still remains a great challenge. Herein, for the first time, high‐crystalline and highly stable CsCu₂I₃ single crystal, which is acquired by a low‐cost antisolvent vapor assisted method, is successfully developed to construct high‐speed (t_rise/t_decay = 0.19 ms/14.7 ms) and UV‐to‐visible broadband (300–700 nm) photodetector, outperforming most reported photodetectors based on individual all‐inorganic lead‐free metal halides. Intriguingly, facet‐dependent photoresponse is observed for CsCu₂I₃ single crystal, whose morphology consists of {010}, {110}, and {021} crystal planes. The on–off ratio of {010} crystal plane is higher than that of {110} crystal plane, mainly owing to lower dark current. Furthermore, photogenerated electrons are localized in twofold chains created by [CuI₄] tetrahedra, leading to relatively small effective mass and fast transport mobility along the 1D transport pathway. Anisotropic carrier transport characteristic is related to stronger confinement and higher electron density for {110} crystal planes. This work not only demonstrates the great potential of CsCu₂I₃ single crystal in high‐performance optoelectronics, but also gives insights into 1D electronic structure associated with fast photoresponse and high anisotropy.     

Crystal growth and equilibrium crystal shapes of silicon in the melt

The crystal growth shape (CGS) and equilibrium crystal shape (ECS) of silicon in Si melt are observed using in situ observation. Fully faceted silicon CGSs, which are dominated by the {111} facets, are observed from the {112} and {110} orientation. Silicon CGS in three‐dimensional in Si melt is octahedral in shape, bounded by {111} facets. Silicon ECSs in the melt are obtained by the relaxation from the CGSs and exhibit the {111} facets separated by curved interface. Copyright © 2012 John Wiley & Sons, Ltd.     

A study of the evolution process of antiphase boundaries in GaAs on Si

A study by high resolution electron microscopy and conventional transmission electron microscopy of the process of closure of antiphase boundaries (APB) in atomic layer molecular beam epitaxy (ALMBE) grown GaAs on silicon is reported. A parallelepipedical shape, closed at the top by another boundary with a semispheric shape, is proposed for the during growth suppressed APBs in GaAs epilayers. Antiphase boundaries are mostly located in {100} plans. Sixty degree dislocations are involved in the process of bending of APBs from {110} to {11n} planes; this bending is the initial step which must take place to get a single domain by interaction of two APBs. The proposed shape for closed APBs is in good agreement with the quasi two-dimensional growth observed for GaAs grown on silicon by ALMBE.     

Orientation‐Controlled Selective‐Area Epitaxy of III–V Nanowires on (001) Silicon for Silicon Photonics

Monolithic integration of III–V nanowires on silicon platforms has been regarded as a promising building block for many on‐chip optoelectronic, nanophotonic, and electronic applications. Although great advances have been made from fundamental material engineering to realizing functional devices, one of the remaining challenges for on‐chip applications is that the growth direction of nanowires on Si(001) substrates is difficult to control. Here, catalyst‐free selective‐area epitaxy of nanowires on (001)‐oriented silicon‐on‐insulator (SOI) substrates with the nanowires aligned to desired directions is proposed and demonstrated. This is enabled by exposing {111} planes on (001) substrates using wet chemical etching, followed by growing nanowires on the exposed planes. The formation of nanowire array‐based bottom‐up photonic crystal cavities on SOI(001) and their coupling to silicon waveguides and grating couplers, which support the feasibility for on‐chip photonic applications are demonstrated. The proposed method of integrating position‐ and orientation‐controllable nanowires on Si(001) provides a new degree of freedom in combining functional and ultracompact III–V devices with mature silicon platforms.