TEA序列带CO2激光器的实验研究

在腔内ＣＯ２热池长度小于放电区长度的条件下,进行了序列带ＴＥＡＣＯ２激光器光性能研究。经条件的选择,获得了四十余条序列带谱线激光输出,其中１０余条谱线达１Ｊ对上。     

工作条件对TEA序列带CO2激光器输出的影响

选择主放电电容器容量、电压、混合气配气比和预电离条件等对ＴＥＡＣＯ２序列带激光输出随注入能量变化的特性进行了研究。采取有效的能量注入,获得了好的输出结果。     

AT&T在有线网上提供电话业务

ＡＴ＆Ｔ宽带与因特网业务公司（ＡＴ＆ＴＢＩＳ）在加州的弗里蒙特首次进行了基于有线电视网的电话业务试验，试验的结果比预想的更成功。ＡＴ＆Ｔ已与该地区２０％用户签订了提供业务的合同。ＡＴ＆Ｔ计划到今年年末在１０个城市推出有线电话业务。AT&T在有线网上提供电话业务     

硅基TFT有源矩阵液晶显示技术

介绍了薄膜晶体管（ＴＦＴ）,特别是ｐ－Ｓｉ（多晶硅）ＴＦＴ矩阵寻址液晶显示器的工作原理、结构、特点、制作工艺和电学特性,对器件参数的选择进行了分析     

电离辐射引起MOSFET跨导退化的机制

通过研究６０Ｃｏｒ射线对ＭＯＳＦＥＴ跨导的影响，定性描述了辐照栅偏置条件以及氧化物电荷积累和Ｓｉ／ＳｉＯ２界面态密度增加分别与ＮＭＯＳＦＥＴ和ＰＭＯＳＦＥＴ跨导衰降之间的依赖关系。试验表明，对于ＰＭＯＳＦＥＴ，电离辐射感生氧化物正电荷累和界面太度增加降导致器件跨导退化。对于ＮＭＯＳＦＥＴ来说。这种退化只与辐射感生界面态密度增长有关。     

HEMT－HBT单片集成技术

简要介绍了ＨＥＭＴ－ＨＢＴ单片集成技术，并对目前用选择ＭＢＥ和ＨＥＭＴ－ＨＢＴ综合工艺制作的ＨＥＭＴ、ＨＢＴ器件和ＨＥＭＴ－ＨＢＴ，放大器性能进行了评述。     

HEMT—HBT单片集成技术

简要介绍了ＨＥＭＴ－ＨＢＴ单片集成技术，并对目前用选择ＭＢＥ和ＨＥＭＴ－ＨＢＴ综合工艺制作的ＨＥＭＴ、ＨＢＴ器件和ＨＥＭＴ－ＨＢＴ，放大器性能进行了评述。     

CATV系统中弱信号的接收

ＣＡＴＶ系统中弱信号的接收咸阳市杨陵区距西安市约有９０公里，西安电视台信号的空间场强在此为２８～３２ｄＢ，为了获得较好的图像质量，针对本单位的ＣＡＴＶ系统进行了改造，并在不同单位进行试验效果都比较理想，可达主观评价三级标准。１器件的选择原系统中西安台...     

TE10和TEM模耦合器的本征值表示法

利用本征值平衡条件，导出了ＴＥ１０和ＴＥＭ模耦合器的参数。试验表明，理论与试验结果非常吻合。     

预条件共轭梯度法在辐射和散射问题的应用

用矩量法求解一些辐射和散射问题,如线天线辐射和线状体散射等问题时,可以产生一个Ｔｏｅｐｌｉｔｚ线性方程组,采用预条件共轭梯度法（ＰＣＧ）与快速富里叶变换（ＦＦＴ）的结合方法（ＰＣＧＦＦＴ）来求解该方程组,其中预条件器采用Ｔ．Ｃｈａｎ的优化循环预条件器。使用ＰＣＧＦＦＴ算法,可有效地节省内存,提高了计算速度。为说明其有效性,将ＰＣＧＦＦＴ算法与ＣＧＦＦＴ算法以及Ｌｅｖｉｎｓｏｎ递推算进行了对比。     

A PSO‐based maximum power point tracking for photovoltaic systems under environmental and partially shaded conditions

To increase the efficiency of photovoltaic (PV) systems, maximum power point (MPP) tracking of the solar arrays is needed. Solar arrays output power depends on the solar irradiance and temperature. Also the mismatch phenomenon caused by partial shade will affect the output power of solar systems and lead to the incorrect operation of conventional MPP tracker. Under partially shaded conditions, the solar array power–current characteristic has multiple maximum. This paper presents a maximum power point tracking (MPPT) with particle swarm optimization method for PV systems under partially shaded condition. The performance of the proposed method is compared with perturb and observe (P&O), improved P&O, voltage‐based maximum power point tracking and current‐based maximum power point tracking algorithms, especially, under partially shaded condition. Simulation results confirm that proposed MPPT algorithm with high accuracy can track the peak power point under different insolation, temperature and partially shaded conditions, and it has the best performance in comparison with four mentioned MPPT algorithms. Also under rapidly changing atmospheric conditions, the P&O algorithm is diverged. Copyright © 2013 John Wiley & Sons, Ltd.     

Temperature‐dependency analysis and correction methods of in situ power‐loss estimation for crystalline silicon modules undergoing potential‐induced degradation stress testing

We propose a method for in situ characterization of the photovoltaic module power at standard test conditions, using superposition of the dark current–voltage (I–V) curve measured at the elevated stress temperature, during potential‐induced degradation (PID) testing. PID chamber studies were performed on several crystalline silicon module designs to determine the extent to which the temperature dependency of maximum power is affected by the degradation of the modules. The results using the superposition principle show a mismatch between the power degradation measured at stress temperature and the degradation measured at 25 °C, dependent on module design, stress temperature, and level of degradation. We investigate the correction of this mismatch using two maximum‐power temperature translation methods found in the literature. For the first method, which is based on the maximum‐power temperature coefficient, we find that the temperature coefficient changes as the module degrades by PID, thus limiting its applicability. The second method investigated is founded on the two‐diode model, which allows for fundamental analysis of the degradation, but does not lend itself to large‐scale data collection and analysis. Last, we propose and validate experimentally a simpler and more accurate maximum‐power temperature translation method, by taking advantage of the near‐linear relationship between the mismatch and power degradation. This method reduces test duration and cost, avoids stress transients while ramping to and from the stress temperature, eliminates flash testing except at the initial and final data points, and enables significantly faster and more detailed acquisition of statistical data for future application of various statistical reliability models. Copyright © 2015 John Wiley & Sons, Ltd.     

Achieving Maximum Power in Thermoelectric Generation with Simple Power Electronics

A thermoelectric generator typically delivers a relatively low power output, and hence it is of great practical importance to determine a design and operating condition close to those which can provide the maximum attainable power. To maintain a favorable condition for the maximum power output, power electronics circuits are usually applied. One of the simplest methods is to control the operating voltage at half the open-circuit voltage, assuming that the typical impedance-matching condition, in which the load and internal resistances are matched, yields the maximum power output. However, recent investigations have shown that, when external thermal resistances exist between the thermoelectric modules and thermal reservoirs, the impedance-matching condition is not identical to the condition for the maximum power output. In this article, it is argued that, although the impedance-matching condition is not the condition for maximum power output, the maximum power is still achievable when the operating voltage is kept at half the open-circuit voltage. More precisely, it is shown that the typical V–I curve for thermoelectric generators must show approximately linear behavior, which justifies the use of a simple strategy in thermoelectric power generation applications. The conditions for the validity of the approximation are mathematically discussed, supported by a few examples. Experimental evidence at room temperature is also provided.     

Current–voltage curve translation by bilinear interpolation

By means of bilinear interpolation and four reference current–voltage (I–V) curves, an I–V curve of a photovoltaic (PV) module is translated to desired conditions of irradiance and PV module temperature. The four reference I–V curves are measured at two irradiance and two PV module temperature levels and contain all the essential PV module characteristic information for performing the bilinear interpolation. The interpolation is performed first with respect to open‐circuit voltage to account for PV module temperature, and second with respect to short‐circuit current to account for irradiance. The translation results over a wide range of irradiances and PV module temperatures agree closely with measured values for a group of PV modules representing seven different technologies. Root‐mean‐square errors were 1·5% or less for the I–V curve parameters of maximum power, voltage at maximum power, current at maximum power, short‐circuit current, and open‐circuit voltage. The translation is applicable for determining the performance of a PV module for a specified test condition, or for PV system performance modeling. Copyright © 2004 John Wiley & Sons, Ltd.     

LDMOS开关在不同频率下的热安全工作

研究了LDMOS器件内部的最高温度与开关频率之间的关系.结果表明:在较高频率工作时,器件内部的最高温度与器件的热容、功耗、占空比和连续工作时间有关,而与器件的热阻和信号周期无关,器件会一直处于升温状态;在较低频率工作时,器件内部的最高温度还与器件的热阻和周期有关.所得结果可作为功率器件在各种频率下工作时热安全工作的参考.     

On-state voltage drop based derating/uprating on a MW converter to improve reliability

Power semiconductor devices are the most fragile components limiting reliability of power converters, where major stresses are temperature dependent parameters. Typically, the operating virtual maximum junction temperature is specified by a manufacturer for each individual device. The thermal system and operating load are designed based on this number. Online monitoring of an on-state collector–emitter voltage (υ_ce,on) and a junction temperature is necessary to ensure the design performance within a safe limit and also to make this method applicable for derating/uprating power. This paper presents the real time measurement of υ_ce,on and thereby the junction temperature estimation in high power converters. Knowing these parameters online, the maximum power capability can be detected. The operating maximum junction temperature is selected and thereby based on the operating condition the derating of power is shown for a megawatt (MW) converter. An experimental setup including online monitoring is described and the measurement of power derating is presented at the specified conditions.     

解析24 GHz频段短距雷达设备电磁兼容欧洲标准

解读ETSI EN 302288-1中对测试电源的极端电压和环境的温、湿度要求。介绍短距离设备的频率范围、功率密度、杂散发射与带外发射等测量参数,以及电波暗室中辐射测量的通用测量方法和场地要求。     

Evaluation of the ruggedness of power DMOS transistor from electro-thermal simulation of UIS behaviour

High-voltage power MOSFETs have been widely used in switching mode power supply circuits as output drivers for industrial and automotive electronic control systems. However, as the device size is reduced, the energy handling capability is becoming a very important issue to be addressed together with the trade-off between the series on-resistance R_ON and breakdown voltage V_BR. Unclamped inductive switching (UIS) condition represents the circuit switching operation for evaluating the “ruggedness”, which characterizes the device capability to handle high avalanche currents during the applied stress. In this paper we present an experimental method which modifies the standard UIS test and allows extraction of the maximum device temperature after the applied standard stress pulse vanishes. Corresponding analysis and non-destructive prediction of the ruggedness of power DMOSFETs devices supported by advanced 2-D mixed mode electro-thermal device and circuit simulation under UIS conditions using calibrated physical models is provided also. The results of numerical simulation are in a very good correlation with experimental characteristics and contribute to their physical interpretation by identification of the mechanism of heat generation and heat source location and continuous temperature extraction.     

基于最大功率传输效率法的近场三维方向图赋形

讨论如何利用带约束的最大功率传输效率(CMMPTE)法通过阵列天线来综合三维方向图。通过引入测试接收阵列天线,待设计的阵列天线与之构成无线功率传输(WPT)系统,从而将方向图的综合问题转换成WPT系统功率传输效率(PTE)的优化问题。通过调整约束条件,在保证PTE最大化的条件下可获得阵列天线的激励分布,根据激励分布设计馈电网络实现近远场方向图的赋形。作为例子,设计了中心频率为2.45 GHz的赋形天线阵列,该阵列由48个微带天线单元组成,排成六棱柱形状,并在棱柱内部实现了三维圆柱形的电场赋形。     

大气与真空下功率VDMOS散热特性研究

针对功率VDMOS真空下壳温显著升高的问题,对安装叉指形散热器的功率VDMOS进行了三维建模和温度场模拟分析,研究了其在大气与真空环境下的散热模型。真空环境下功率为10 W、散热片面积为278.42 cm2时,VDMOS壳温较大气下升高了89.8℃。找出了VDMOS大气及真空下壳温与工作功率及散热器表面积之间存在的关系,并进行了相应实验,利用公式计算出的器件壳温与实验壳温的最大差值,大气下不超过2℃、真空下不超过3℃,皆未超过5%,该公式可以作为功率VDMOS应用及热设计的参考依据。分析了真空环境下,功率VDMOS壳温显著升高的原因,并提出了改善措施。