UHVCVD SiGe外延设备真空腔室及自动传输系统设计

介绍了UHVCVD SiGe外延设备真空腔室及自动传输系统的具体设计,通过合理选取预备室和反应室的真空泵组,满足了设备的超高真空要求,自动传输系统则保证了反应室高洁净环境、提高外延生产效率。     

防隔热试验用平板型石英灯加热器热环境分析

本文采用Monte-Carlo法(MCM),对用于防/隔热材料筛选或性能考核试验的平板型石英灯加热器热环境(辐射特性)进行了分析。重点对石英灯加热器中水冷反光板面积、水冷反光板与灯阵间距离、热源疏密程度、热源阵列与材料受热面间距等因素对辐射热场中典型隔热材料受热表面温度分布均匀性和热流密度进行了模拟计算。     

源汇耦合的电子设备内自然对流换热的实验研究

针对电子设备散热问题,通过无接触激光全息干涉技术和烟流微风示踪技术对多热源耦合的电子设备散热问题进行研究,分析Rayleigh数、热源数量、热源间距、壁面温差等因素对腔体内流动换热的影响,实验研究发现:随着Rayleigh数的增加,流动换热增强;热源数量的增加对流动换热不利;当腔内有两个热源时,热源间距50 mm时换热效果最好;随着腔内高低温壁面温差的增加,对流动和换热越来越有利,但换热速率不断减小,温差为10℃最有利,为电子设备散热设计提供理论依据。     

变结构反应离子刻蚀腔室流场热场的数值仿真

为了提高刻蚀的均匀性, 对400mm反应离子刻蚀(RIE)腔室建立了气体流动的连续流体模型和热传递模型, 研究了反应腔室内压强、流速和温度分布。冷却板恒温285K时, 依次改变入口流量和出口压强, 分别分析了腔室内部基片晶圆附近的流速、压强、温度的分布; 依次改变极板间距离(30mm~60mm)、进气口直径(300mm~620mm)、抽气口直径(50mm~250mm), 分析了反应腔室内气流和温度分布。结果表明, 压强分布呈现出边缘低中心高的特征, 流速呈现边缘高且中心低的特征, 且在小流量时压强的均匀性较好; 压强分布的均匀性随腔室极板间距离增加而有所提高, 且随腔室气体出口面积减小与进口面积增加也有所提高; 基片晶圆上方附近处温度场大面均匀、稳定, 几乎不受入口流量波动变化的影响, 热稳定性良好。该研究对大口径RIE腔室结构设计改进及对大口径反应离子刻蚀工艺控制具有重要意义。     

高光束质量大功率半导体激光阵列的微通道热沉

针对现有高光束质量大功率半导体激光阵列内部发光单元条宽、填充因子不断减小,腔长不断增加的发展趋势所带来的热源分布及长度变化影响器件热阻的问题,利用分离热源边界条件结合商用计算流体力学(CFD)软件FLUENT进行数值计算,获得微通道热沉热阻随阵列器件发光单元条宽、空间位置变化关系以及不同阵列腔长对应的微通道优化长度.根据优化参数制备获得尢氧铜微通道热沉,并对宽1 cm,腔长1 mm,条宽100μm,填充因子为25%的半导体激光阵列进行散热能力测试,冷却器外形尺寸27 mm×11 mm×1.5 mm.微通道热沉热阻0.34 K/W,能够满足半导体激光阵列器件高功率集成输出的散热需求.     

红外测量技术在MOCVD中的应用

简要说明了红外辐射测量技术的工作原理与理论基础以及红外测量的特点.MOCVD硅片外延生长过程中反射率是实时变化的,但传统红外测量方法无法实现反射率的实时测量,因此造成较大的测量误差,无法准确反应外延片的表面温度,同时无法实现对生长速率的在位测量.德国AIXTRON公司的MOCVD测量系统中加入了由脉冲信号控制的LED红外发光器件,实现了温度与反射率、生长速率与膜厚的在位实时测量,从而达到对温度和膜厚的精确控制,取得良好的实验效果.     

一种低能耗的CCFL液晶电视背光源设计

讨论了混光腔高度、反射膜边角角度、CCFL灯管数量和间距、灯管与反射膜之间距离以及扩散板类型对模组光学利用率和光学效果的影响。以119.4cm(47in)CCFL液晶电视为例,使用Solidworks模拟出一组较优化的机械光学参数,并根据模拟参数完成了样品的制作与相应参数的测试。     

体内异常热源信息的红外无损探测模拟

为了有效地探测人体内部异常热源信息,基于傅里叶定律和能量守恒定律建立了含球状热源的传热微分方程,通过表面等温线分布求解微分方程,得到表面温度分布与内部异常热源的深度、大小和温度之间的关系,从而建立体表面温度分布与体内球状异常热源之间的球状热源传热模型;采用有限元分析软件COMSOL对该模型进行模拟仿真和数值分析,同时利用红外热像仪采集实体模型的表面温度分布,逆向求解内热源信息。将仿真分析和实际数值分析得到的内部异常热源信息与实际对比,两者所得的结果与实际达到毫米级误差。     

等离子体刻蚀过程中的FTIR监控技术

采用傅里叶红外光谱仪(FHR)和MCT红外探测器可以构成原位的FTIR测量系统,可应用于在电感耦合等离子体刻蚀机中进行的硅刻蚀工艺.文中对反应腔室腔壁状态对刻蚀过程的影响,以及在硅晶片表面反应层的变化进行了详细的研究.实验表明:采用含F化合物对反应腔室进行清洗会改变反应腔室的状态,在腔室内壁状态达到稳定之前会对刻蚀速率的一致性造成扰动.硅片表面反应层中的化学组成变成了以CF为主的薄膜层,对刻蚀过程的有一定的抑制作用.     

一种低剖面宽带天线阵设计

以印刷偶极子天线为阵元,令功分网络与阵元垂直交互放置,以降低阵列剖面高度,并结合紧耦合阵列思想,优化天线参数,最终实现L频段(0.8~2 GHz)8×8低剖面宽带阵列天线的设计。单列1×8天线子阵,阵元依E面排列,阵元间距设计为100 mm,可通过1个一分八功分器合成输出。扩展为8×8规模阵列,列间距设计为84 mm,可满足全频段(0.8~2 GHz)水平面±45°范围的扫描需求。仿真结果显示,该8×8阵列在水平面±45°扫描时,最大有源驻波小于2.5,阵列法向增益大于16.2 dBi。该阵列尺寸为648 mm×800 mm×64 mm,阵列口径效率优于90%。加工制作了单列1×8天线子阵,子阵尺寸为70 mm×800 mm×64 mm。测试结果与仿真数据吻合,测试结果显示,该天线子阵在0.8~2 GHz频段内驻波小于2.5,增益优于10 dBi。     

Modeling of three-dimensional effects on temperature uniformity inrapid thermal processing of eight inch wafers

A three-dimensional steady-state model of the industry-standard AG Associates 4108 Heatpulse Rapid Thermal Processing system has been developed for the study of thermal uniformity across 8 inch wafers. The model combines radiation energy transfer among all solid surfaces in the chamber with energy transfer among the chamber materials and to the process ambient. Surfaces included are those of the tungsten filaments of the lamps, the silicon wafer, the polysilicon annular thermal guard ring, the quartz process tube, and the gold reflectors which surround the lamps and process tube. These surfaces are divided into approximately 4800 individual surface elements for the radiation transfer allowing very accurate thermal analysis. The model has previously been shown to provide very good agreement with experiment for temperature distributions across an 8 inch wafer. The model is presently used to make quantitative examinations of asymmetric effects occurring in a RTP chamber which cannot be examined by 2-dimensional models. Situations examined include the effect of nonuniform lamp power distributions. Also examined is tilting of the wafer with respect to the flow tube and reflective chamber     

A model for rapid thermal processing: achieving uniformity throughlamp control

A first-principles approach to the modeling of a rapid thermal processing (RTP) system to obtain temperature uniformity is described. RTP systems are single wafer and typically have a bank of heating lamps which can be individually controlled. Temperature uniformity across a wafer is difficult to obtain in RTP systems. A temperature gradient exists outward from the center of the wafer due to cooling for a uniform heat flux density on the surface of the wafer from the lamps. Experiments have shown that the nonuniform temperature of a wafer in an RTP system can be counteracted by adjusting the relative power of the individual lamps, which alters the heat flux density at the wafer. The model is composed of two components. The first predicts a wafer's temperature profile given the individual lamp powers. The second determines the relative lamp power necessary to achieve uniform temperature everywhere but at the outermost edge of the wafer (cooling at the edge is always present). The model has been verified experimentally by rapid thermal chemical vapor deposition of polycrystalline silicon with a prototype LEISK RTP system. The wafer temperature profile is inferred from the poly-Si thickness. Results showed a temperature uniformity of ±1%, an average absolute temperature variation of 5.5°C, and a worst-case absolute temperature variation of 6.5°C for several wafers processed at different temperatures     

Validation of a Rapid Thermal Processing model in steady-state

Rapid Thermal Processing (RTP) is widely used in advanced semiconductor manufacturing. The present work deals with the heat transfer from infrared lamps to the silicon wafer in a commercial RTP equipment. Both numerical and experimental approaches are considered. For numerical purposes, the RTP system is modelled in two (2D) and three dimensions (3D). Calculations are performed in steady-state. The computational fluid dynamics method (CFD) is used for solving the mass and heat conservation equations. The radiative heat transfer equation is solved with the Monte Carlo method. In order to validate these models, measurements of the wafer temperature are realized for five electric power values supplied to the infrared lamps. The experimental wafer temperature profiles are in good agreement with the numerically calculated ones. Moreover, a confrontation between the experimental temperature of the infrared lamp filaments evaluated from the Ohm law and the one used in the numerical calculations shows a good agreement with the 3D model. The slight difference observed with the 2D model is explained. So the numerical simulations are fully validated. Two relations are established in order to predict the power which has to be applied to infrared lamps to obtain the required wafer temperature.     

A novel illuminator design in a rapid thermal processor

The instantaneous insertion of an opaque shutter between the lamp arrays and the wafer in a rapid thermal processor can significantly increase the ramp-down rate from 90 to 400°C/s during the cooling period. This shutter can prevent the residual heating of lamp filament as well as the self-heating from the reflector due to the mirror image of the wafer. To compensate for the weak irradiation intensity close to the edge of the linear lamps, a multiplane reflector design is used to increase the uniformity of irradiation intensity in the direction along the linear lamps. The distance between the reflector plane and the linear lamp is designed to be smaller at the edge, as compared to the center, of the linear lamp. Together with two oblique reflectors at the ends of the linear lamps, a typical three-plane reflector design can increase the uniformity by 60% in a typical lamp configuration     

Development of a hexagonal-shaped rapid thermal processor using avertical tube

A new RTP system concept is proposed and demonstrated. The system uses a vertical cylindrical quartz tube, while the wafer is placed horizontally. Linear halogen lamps are arranged in a hexagonal shape, and the hexagonal-shaped lamp groups are stacked vertically. Each lamp group is controlled independently, allowing a temperature difference within ±1.5°C to be achieved over a 6-in wafer in steady state. Oxidation under optimal power condition results in a 1.37% standard deviation for an average oxide thickness of 110.4 Å. The temperature nonuniformity during the transient has been greatly improved by using dynamic control. The convection loss in the system has been evaluated and its radial dependence is found to be smoother in this chamber than in a conventional rectangular chamber. The ray-tracing simulation in three-dimensional space did result in a better comprehension of the optically complex system. The system efficiency has turned out to be lower than in the case of a conventional rectangular chamber. A large portion of the radiation energy is absorbed by the reflectors. There is a strong side heating to the vertical edge of the wafer. Both are due to multiple horizontal reflections of the rays on the reflectors without hitting the wafer. The temperature profiles calculated from the ray-tracing results show an excellent agreement with experiments and confirm the accuracy of the ray-tracing simulation. The main advantages of this new system concept are its excellent temperature uniformity and the good accessibility of the wafer for technological treatments and in situ measurements     

基于蒙特卡洛方法的红外光源辐照特性模拟

以红外灯阵列作为辐射热源进行温度环境试验,为通过优化灯阵提高受热平面温度分布均匀程度,需要对红外灯在受热平面上的辐射照度分布进行建模。利用蒙特卡洛方法对发光体上光线出射位置和出射方向进行了随机抽样,确定了出射光线方程。对光线追迹获得了光线在受热平面上的落点坐标。对大量出射光线进行了随机抽样和追迹,建立了受热平面上的光线落点坐标数据库。在受热平面上划分网格并统计各网格内光线落点数量,计算得出受热平面辐射照度分布情况。和实测辐射照度数据相比,本模型可在一定范围有效模拟红外灯辐射照度分布。     

A contribution to optimal lamp design in rapid thermal processing

Recent studies of wafer temperature control in rapid thermal processing systems have indicated that a multiring circularly symmetric lamp configuration with independent (multivariable) control of the power applied to each ring is likely to be more successful than the earlier lamp design approaches. An important issue in such multiring lamp systems is the optimal shaping of the output heat flux profile (HFP) of each ring to provide maximum controllability of the wafer temperature. In this paper we seek to optimize the ring HFP's via the lamp design parameters: ring positions and widths. We start by determining the heat loss profiles over the wafer surface for a variety of temperature setpoints and processing conditions. In order to maintain temperature uniformity across the wafer at a given setpoint, the lamp system should provide a compensating HFP. The total lamp HFP is the sum of the individual ring HFPs weighted by their respective applied powers. The HFP's are, in turn, functionally dependent on the lamp design parameters and this dependence can be measured through a calibration process. Therefore, the resulting optimization problem reduces to determining the lamp design parameters that result in lamp HFP's which best approximates the collection of the wafer heat loss profiles. Our method provides a practical technique for determining the optimal lamp design parameters     

Recent developments in rapid thermal processing

Rapid thermal annealing (RTA) with a short dwell time at maximum temperature is used with ion implantation to form shallow junctions and polycrystalline-Si gate electrodes in complementary, metal-oxide semiconductor (CMOS) Si processing. Wafers are heated by electric lamps or steady heat sources with rapid wafer transfer. Advanced methods use “spike anneals,” wherein high-temperature ramp rates are used for both heating and cooling while also minimizing the dwell time at peak temperature to nominally zero. The fast thermal cycles are required to reduce the undesirable effects of transient-enhanced diffusion (TED) and thermal deactivation of the dopants. Because junction profiles are sensitive to annealing temperature, the challenge in spike annealing is to maintain temperature uniformity across the wafer and repeatability from wafer to wafer. Multiple lamp systems use arrayed temperature sensors for individual control zones. Other methods rely on process chambers that are designed for uniform wafer heating. Generally, sophisticated techniques for accurate temperature measurement and control by emissivity-compensated infrared pyrometry are required because processed Si wafers exhibit appreciable variation in emissivity.     

Thermal modeling of a wafer in a rapid thermal processor

A model, using geometric optics, has been developed to calculate the illumination of a wafer inside a rapid thermal processor. The main parameters of the model are: the processing chamber geometry, the lamp number and location, the reflector characteristics, and the wafer temperature. Each incident light component, i.e., direct or reflected, is identified, its contribution to the illumination of the wafer is calculated through a 3D analytical model, and the corresponding contour maps are depicted. Then, the heat diffusion equation is numerically solved in two dimensions, and thermal maps of a Si wafer are given versus various experimental conditions, such as the effect of patterning the reflectors, of individually adjusting the electrical power applied to each lamp, and the impact of rotating the wafer or using crossed lamp banks. The latter method, while being easy to implement, is shown to give excellent thermal uniformity