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本文从设计符合EPCTM C1G2协议的超高频无源射频识别标签芯片的角度出发,对RFID标签芯片模拟前端电路进行设计.通过对各个关键电路的功耗与电源进行优化,实现了一个符合协议要求的低电压、低功耗的超高频无源RFID标签芯片的模拟前端.该UHF RFID标签模拟前端设计采用SMIC 0.18 μm EEPROM CMOS工艺库.仿真结果表明,标签芯片模拟前端的整体功耗控制在2.5 μW以下,工作电源可低至1 V,更好地满足了超高频无源射频识别标签芯片应用需求. 相似文献
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提出了一种新的超高频射频识别(RFID)标签芯片的数据编解码与循环冗余校验(CRC)计算同步进行的电路结构。该电路采用ISO/IEC 18000.6C标准协议,在数据编解码过程中同步进行串行CRC计算来提高系统数据的处理速度。采用FPGA进行仿真分析。结果表明,该设计方法可实现CRC编解码与RFID数据的编解码同步,即不占用额外的时钟处理CRC计算,从而满足超高频RFID的快速通信要求。所提出的串行CRC电路在SIMC 0.18 μm标准CMOS工艺下进行综合,其面积比并行CRC电路节省31.4%,电路算法更简单。 相似文献
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针对集成片上天线(OCA)的超高频射频识别(RFID)标签设计了一款RFID专用协议的基带处理器,以满足RFID标签嵌入纸张及微小物体的防伪功能.由于OCA与读写器天线近场耦合获取能量有限,集成OCA的无源标签对功耗要求更加苛刻.针对微小OCA标签的应用需求,采用异步电路、门控时钟、低压库、多时钟域等低功耗设计方法,设计了专用协议标签基带处理器,其CMOS低压库的设计可以使基带处理器在0.5V的电源电压下工作,综合布局布线后,其电路仿真结果表明,峰值功耗仅为0.32 μW.标签芯片在UMC 0.18 μm标准工艺下流片,测试结果显示,在读写器输出20 dBm能量的情况下,带OCA标签的读距离可达2 mm. 相似文献
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采用SMIC 0.18 μm CMOS工艺,设计了一种低功耗的超高频有源RFID标签芯片射频接收前端电路.其中,低噪声放大器(LNA)采用共源共栅源极电感负反馈差分结构,下变频混频器(Mixer)采用吉尔伯特(Gilbert)有源双平衡结构.通过整体及模块电路优化,该电路在较低功耗下仍然具有较好性能.仿真结果表明,整个接收端功耗仅为14 mW,与传统射频前端芯片相比,功耗降低53%;整体增益为21.6 dB,噪声系数7.1 dB,三阶输入截止点-18.9 dBm,满足有源UHF-RFID标签芯片低功耗高性能的应用需求. 相似文献
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本文设计了一种在低电压下工作的用于射频标签的上电复位电路。此电路一方面采用了一种新型电平检测模块,可以实现精准的电平检测;另一方面采用了一种新型延迟模块,该模块可在0.8V—5V电源电压下工作,可实现100nS到1mS之间的延时;此外,为了降低功耗,电路在产生上电复位信号将利用数字电路产生一个反馈信号来关断整个电路。本文采用smic0.18um的工艺,利用cadence对其功能进行仿真,结果表明该电路可在1.2V工作电压下进行有效复位,并且可以快速的二次复位,复位脉冲宽度为20us左右,功耗极低,完全满足RFID标签的要求。 相似文献
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设计完成了一款无源超高频RFID标签的低功耗模拟前端电路。采用了一种新的阈值消除技术,整流电路的能量转换效率可以达到30%以上;使用一种低功耗的稳压电路,为数字电路提供稳定的1 V电源电压的同时功耗为500 nA。此外提出了一种等效灵敏度的测试方法,可以简便地获得标签芯片的激活功率水平。该设计采用TSMC 0.18μm工艺,整个芯片面积为700μm×800μm。测试结果显示:稳压电路可以输出稳定的0.95 V电压,解调模块可以正确调解幅度大于150 mV的天线信号。根据等效灵敏度测试方法,测得本设计的灵敏度约为-14.9 dBm。 相似文献
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为简化UHF RFID读写器系统设计,提高读写器控制模块控制协调能力、抗干扰强度、降低功耗,提出了一种基于NiosⅡ处理器的UHF RFID读写器控制模块的SOPC设计方案。采用SOPC设计理念,在一个可配置的FPGA芯片上嵌入NiosⅡ处理器,搭载操作系统,实现收发信号的数字处理控制及与上位机系统的通信控制。根据设计需要充分配置了处理器性能,给出了模块硬件结构,模块与上位机、数字基带处理模块间的通信接口及模块软件设计流程图。仿真结果表明,该控制模块能实现所需控制信号的产生和传输,完成协议解析、时序控制、状态转换及防碰撞等功能。与传统嵌入式控制模块相比,该控制模块实时控制能力强、稳定性高,功耗更低,外围电路更简单,系统更小型化。 相似文献
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Mats L. Cain J.T. Mickle M.H. 《Electronics Packaging Manufacturing, IEEE Transactions on》2009,32(2):97-105
Packaging of RFID transponders that operate at ultrahigh frequencies (UHF) requires nontraditional materials and innovative methods in order to make a functional, reliable, and inexpensive RFID transponders. Presented is a statistical analysis along with the model as the way to evaluate measured results and provide the quality and process control for the electrical and mechanical performance of the packaging of RFID tags with respect to different manufacturing processes. The power analysis is presented in support of the statistical analysis and the sample size selection. 相似文献
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To implement an ultra high frequency (UHF) RFID system, the first problem that an enterprise faces is the assurance of stable
and extremely high reading rates. Empirical investigations indicated many hardware and environment factors can affect the
reading rates. Unfortunately, even if all of the hardware and environment factors have been resolved, reading a large number
of RFID tags in a single run is still a challenge. For RFID systems with massive tags, signal collision is the major factor
to reduce system reading rate. To diminish the influence induced by signal collision, this study examined the anti-collision
technology applied in EPCglobal UHF Gen II standards and proposed the method of adapting the Q parameter of control module
in UHF RFID interrogator. Finally, we conducted field simulation to monitor relative reading rates under different conditions
with different tag numbers, speeds passing through portal and Q values. Following by experimental results, this study provided
the criteria to determine optimal Q value by activating system. With proper Q value, stable and extremely high reading rates
in one-time reading of a large number of RFID tags (100 and above) can be achieved. 相似文献
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Modeling and analysis of far field power extraction circuits for passive UHF RF identification (RFID) applications are presented. A mathematical model is derived to predict the complex nonlinear performance of UHF voltage multiplier using Schottky diodes. To reduce the complexity of the proposed model, a simple linear ap-proximation for Schottky diode is introduced. Measurement results show considerable agreement with the values calculated by the proposed model. With the derived model, optimization on stage number for voltage multiplier to achieve maximum power conversion efficiency is discussed. Furthermore, according to the Bode-Fano criterion and the proposed model, a limitation on maximum power up range for passive UHF RFID power extraction circuits is also studied. 相似文献
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Modeling and analysis of far field power extraction circuits for passive UHF RF identification (RFID) applications are presented. A mathematical model is derived to predict the complex nonlinear performance of UHF voltage multiplier using Schottky diodes. To reduce the complexity of the proposed model, a simple linear approximation for Schottky diode is introduced. Measurement results show considerable agreement with the values calculated by the proposed model. With the derived model, optimization on stage number for voltage multiplier to achieve maximum power conversion efficiency is discussed. Furthermore, according to the Bode-Fano criterion and the proposed model, a limitation on maximum power up range for passive UHF RFID power extraction circuits is also studied. 相似文献
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UHF RFID是一款超高频射频识别标签芯片,该芯片采用无源供电方式,对于无源标签而言,工作距离是一个非常重要的指标,这个工作距离与芯片灵敏度有关,而灵敏度又要求功耗要低,因此低功耗设计成为RFID芯片研发过程中的主要突破点。在RFID芯片中的功耗主要有模拟射频前端电路,存储器,数字逻辑三部分,而在数字逻辑电路中时钟树上的功耗会占逻辑功耗不小的部分。本文着重从降低数字逻辑时钟树功耗方面阐述了一款基于ISO18000-6Type C协议的UHF RFID标签基带处理器的的优化和实现。 相似文献
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为了增加射频识别(RFID)传感器的识读范围,针对无源超高频(ultra high frequency,UHF)RFID标签的传感器接口,提出了一种新的低功耗低压时间数字转换器设计。该传感器接口采用基于游标原理的高效时数转换器,在保证分辨率和转换效率的同时,能够实现较低的功耗和较大的动态范围。采用TSMC 90nm标准CMOS技术设计并制造。测量结果显示相比其他类似结构,提出接口在输入时间范围28.18-42.94 时有效分辨率为10.48bits。采样率为20 KS/s时,转换器转化效率为0.396 pJ/bit,且功耗和电压供应分别仅为3.84 和0.6V,能够有效增强无源UHF RFID压力传感器标签的识读范围。 相似文献