The effect of oxygen in Ru gate electrode on effective work function of Ru/HfO2 stack structure

Effective work function (φ_m,eff) values of Ru gate electrode on SiO₂ and HfO₂ MOS capacitors were carefully examined and discussed from the viewpoint of an effect of oxygen incorporation in Ru gate electrode on φ_m,eff. Annealing at 400 °C in the reduction (3%H₂) and the oxidation (1%O₂) ambient resulted in similar changes in the φ_m,eff of Ru/HfO₂/SiO₂ and Ru/SiO₂ MOS capacitors. Furthermore, the Ru gate MOS capacitor after annealing in the oxidation condition have shown almost the same φ_m,eff value to that of RuO₂ gate MOS capacitors. The oxygen concentration in the Ru/HfO₂ interface after annealing in oxidizing atmosphere is approximately one order of magnitude higher than that after annealing in reducing atmosphere as confirmed by secondary ion mass spectroscopy analysis. Furthermore, the higher oxygen concentration at the Ru/dielectric interface leads to the higher φ_m,eff value, regardless of SiO₂ or HfO₂ dielectrics. This indicates that φ_m,eff of Ru gate MOS capacitor is dominantly determined by the oxygen concentration at the Ru/dielectric layer interface rather than the dipoles originated from the oxygen vacancy in HfO₂.     

Effect of RuO2 electrode on laser-MBE prepared HfO2 gate dielectrics

In this paper, we report our recent study of the effect of RuO₂ as an alternative top electrode for pMOS devices to overcome the serious problems of polysilicon (poly-Si) gate depletion, high gate resistance and dopant penetration in the trend of down to 50 nm devices and beyond. The conductive oxide RuO₂, prepared by RF sputtering, was investigated as the gate electrode on the Laser MBE (LMBE) fabricated HfO₂ for pMOS devices. Structural, dielectric and electric properties were investigated. RuO₂/HfO₂/n-Si capacitors showed negligible flatband voltage shift (<10 mV), very strong breakdown strength (>10 MV cm⁻¹). Compared to the SiO₂ dielectric with the same EOT value, RuO₂/HfO₂/n-Si capacitors exhibited at least 4 orders of leakage current density reduction. The work function value of the RuO₂ top electrode was calculated to be about 5.0 eV by two methods, and the effective fixed oxide charge density was determined to be 3.3 × 10¹² cm⁻². All the results above indicate that RuO₂ is a promising alternative gate electrode for LMBE grown HfO₂ gate dielectrics.     

Influence of post deposition annealing on Y2O3-gated GaAs MOS capacitors and their reliability issues

The feasibility of employing yttrium oxide (Y₂O₃) as high-k gate dielectrics for GaAs metal-oxide-semiconductor (MOS) devices has been investigated. MOS capacitors were fabricated using RF-sputtered deposited Y₂O₃ films on NH₄OH treated n-GaAs substrate. Indeed high-k (Y₂O₃)/GaAs MOS capacitors exhibiting fairly good electrical characteristics, for instance, especially low leakage current density, low hysteresis and allowable density of interface states, have been achieved. The effects of several annealing treatments on Y₂O₃-gated GaAs MOS capacitors have been investigated in order to optimize the process conditions. A decrease in accumulation capacitance (C_acc) following PDA effectively increases the equivalent oxide thickness (EOT), which is predicted to be correlated with the growth and continuous increase in the physical thickness of a lower-k inter-layer sandwiched between Y₂O₃ and GaAs. However, leakage currents and interface trap densities are reduced with higher values of annealing temperature. The variation of current density with an equivalent oxide thickness (EOT) has also been investigated.     

N and P metal oxide semiconductor field effect transistor characteristics of hafnium-doped SiO2 gate dielectrics

This work presents the interfacial properties of hafnium-doped SiO₂ films via N and P metal oxide semiconductor (MOS) materials, MOS-capacitor, and N and P metal oxide semiconductor field effect transistor (MOSFET) characterization. The results indicate that HfSi_xO_y films (a) have excellent transistor characteristics; (b) remain amorphous through high-temperature processing; (c) are compatible with N+ and P+ polysilicon electrodes; (d) have lower gate leakage than SiO₂ of the same equivalent oxide thickness (EOT); and (e) have a dielectric constant of ∼8. Therefore, the hafnium-doped SiO₂ films are at-tractive as a dielectric material and offer a technologically relevant gate-stack node for insertion, prior to deployment of high-K dielectrics.     

Electrical characterization of high-k gate dielectrics fabricated using plasma oxidation and post-deposition annealing of a Hf/SiO2/Si structure

High permittivity (high-k) gate dielectrics were fabricated using the plasma oxidation of Hf metal/SiO₂/Si followed by the post-deposition annealing (PDA), which induced a solid-phase reaction between HfO_x and SiO₂. The oxidation time and PDA temperature affected the equivalent oxide thickness (EOT) and the leakage current density of the high-k dielectric films. The interfacial structure of the high-k dielectric film/Si was transformed from HfO_x/SiO₂/Si to HfSi_xO_y/Si after the PDA, which led to a reduction in EOT to 1.15 nm due to a decrease in the thickness of SiO₂. These high-k dielectric film structures were investigated by X-ray photoelectron spectroscopy. The leakage current density of high-k dielectric film was approximately four orders of magnitude lower than that of SiO₂.     

MOS devices with tetragonal ZrO2 as gate dielectric formed by annealing ZrO2/Ge/ZrO2 laminate

A Ge-stabilized tetragonal ZrO₂ (t-ZrO₂) film with permittivity (κ) of 36.2 was formed by depositing a ZrO₂/Ge/ZrO₂ laminate and a subsequent annealing at 600 °C, which is a more reliable approach to control the incorporated amount of Ge in ZrO₂. On Si substrates, with thin SiON as an interfacial layer, the SiON/t-ZrO₂ gate stack with equivalent oxide thickness (EOT) of 1.75 nm shows tiny amount of hysteresis and negligible frequency dispersion in capacitance-voltage (C-V) characteristics. By passivating leaky channels derived from grain boundaries with NH₃ plasma, good leakage current of 4.8 × 10⁻⁸ A/cm² at V_g = V_fb − 1 V is achieved and desirable reliability confirmed by positive bias temperature instability (PBTI) test is also obtained.     

Degradation of RuO2 thin films in hydrogen atmosphere at temperatures between 150 and 250 °C

Ruthenium dioxide films were sputtered on silicon dioxide/silicon in thin-film resistors and MOS capacitors structures. Such structures with RuO₂ were exposed to H₂/N₂ ambient with 1% hydrogen content in the temperature range from 150 to 250 °C. Severe morphological degradation of RuO₂ films was observed by scanning electron microscope. By X-ray diffraction analysis it was proved that RuO₂ tends to reduce to Ru in the presence of hydrogen. The pattern of degradation is strongly influenced by the preparation condition: films deposited at room temperature show irregular degradation shape, and films deposited at 300 °C exhibit star-like shape. The shift in capacitance–voltage curves of MOS capacitors with RuO₂ gate electrode after degradation also proves the presence of Ru in the electrode. The failure of the above structures when exposed to hydrogen ambient suggests the need of introduction of hydrogen barrier layers to exploit the good properties of RuO₂.     

A novel thermally-stable zirconium amidinate ALD precursor for ZrO2 thin films

ZrO₂ thin films were deposited by the atomic layer deposition process on Si substrates using tetrakis(N,N′-dimethylacetamidinate) zirconium (Zr-AMD) as a Zr precursor and H₂O as an oxidizing agent. Tetrakis (ethylmethylamino) zirconium (TEMA-Zr) was also evaluated for a comparative study. Physical properties of ALD-derived ZrO₂ thin films were studied using ellipsometry, grazing incidence XRD (GI-XRD), high resolution TEM (HRTEM), and atomic force microscopy (AFM). The ZrO₂ deposited using Zr-AMD showed a better thermal stability at high substrate temperature (>300 °C) compared to that using TEMA-Zr. GI-XRD analysis reveals that after 700 °C anneal both ZrO₂ films enter tetragonal phase. The electrical properties of N₂-annealed ZrO₂ film using Zr-AMD exhibit an EOT of 1.2 nm with leakage current density as low as 2 × 10⁻³ A/cm² (@V_fb−1 V). The new Zr amidinate is a promising ALD precursor for high-k dielectric applications.     

Thermal annealing effect on electrical properties of metal nitride gate electrodes with hafnium oxide gate dielectrics in nano-metric MOS devices

Electrical properties of hafnium oxide (HfO₂) gate dielectric with various metal nitride gate electrodes, i.e., tantalum nitride (TaN), molybdenum nitride (MoN), and tungsten nitride (WN), were studied over a range of HfO₂ thicknesses, e.g., 2.5-10 nm, and post-metal annealing (PMA) temperatures, e.g., 600 °C to 800 °C. The work function of the nitride gate electrode was dependent on the material and the post-metal annealing (PMA) temperature. The scanning transmission electron microscopy technique is used to observe the effect of PMA on the interfacial gate dielectric thickness. After high-temperature annealing, the metal nitride gates were suitable for NMOS. At the same PMA temperature, the oxide-trapped charges increased and the interface state densities decreased with the increase of the HfO₂ thickness for TaN and WN gate electrodes. However, for MoN gate electrode the interface state density is almost independent of film thickness. Therefore, dielectric properties of the HfO₂ high-k film depend not only on the metal nitride gate electrode material but also the post-metal annealing condition as well as the film thickness. During constant voltage stress of the MOS capacitors, an increase in the time-dependent gate leakage current is also observed.     

Physical and electrical characterization of polysilicon vs. TiN gate electrodes for HfO2 transistors

The effects of pre-deposition substrate treatments and gate electrode materials on the properties and performance of high-k gate dielectric transistors were investigated. The performance of O₃ vs. HF-last/NH₃ pre-deposition treatments followed by either polysilicon (poly-Si) or TiN gate electrodes was systematically studied in devices consisting of HfO₂ gate dielectric produced by atomic layer deposition (ALD). High-angle annular dark field scanning transmission electron microscopy (HAADF-STEM) using X-ray spectra and Electron Energy Loss Spectra (EELS) were used to produce elemental profiles of nitrogen, oxygen, silicon, titanium, and hafnium to provide interfacial chemical information and to convey their changes in concentration across these high-k transistor gate-stacks of 1.0–1.8 nm equivalent oxide thickness (EOT). For the TiN electrode case, EELS spectra illustrate interfacial elemental overlap on a scale comparable to the HfO₂ microroughness. For the poly-Si electrode, an amorphous reaction region exists at the HfO₂/poly-Si interface. Using fast transient single pulse (SP) electrical measurements, electron trapping was found to be greater with poly-Si electrode devices, as compared to TiN. This may be rationalized as a result of a higher density of trap centers induced by the high-k/poly-Si material interactions and may be related to increased physical thickness of the dielectric film, as illustrated by HAADF-STEM images, and may also derive from the approximately 0.5 nm larger EOT associated with polysilicon electrodes on otherwise identical gate stacks.     

Damascene TiN-Gd2O3-gate stacks: Gentle fabrication and electrical properties

In this work, we present MOS capacitors and field effect transistors with a crystalline gadolinium oxide (Gd₂O₃) gate dielectric and metal gate electrode (titanium nitride) fabricated in a gentle damascene gate last process. Details of the gate last process and initial results on MOS devices with equivalent oxide thicknesses (EOT) of 3.0 nm and 1.5 nm, respectively, are shown.     

Integration of HfxTayN metal gate with SiO2 and HfOxNy gate dielectrics for MOS device applications

Interaction of Hf_xTa_yN metal gate with SiO₂ and HfO_xN_y gate dielectrics has been extensively studied. Metal-oxide-semiconductor (MOS) device formed with SiO₂ gate dielectric and Hf_xTa_yN metal gate shows satisfactory thermal stability. Time-of-flight secondary ion mass spectroscopy (TOF-SIMS) analysis results show that the diffusion depths of Hf and Ta are less significant in SiO₂ gate dielectric than that in HfO_xN_y. Compared to HfO_xN_y gate dielectric, SiO₂ shows better electrical properties, such as leakage current, hysteresis, interface trap density and stress-induced flat-band voltage shift. With an increase in post metallization annealing (PMA) temperature, the electrical characteristics of the MOS device with SiO₂ gate dielectric remain almost unchanged, indicating its superior thermal and electrical stability.     

Comparison between the electrical properties of atomic layer deposited thin ZrO2 films processed from cyclopentadienyl precursors

Electrical characterization of zirconium oxide (ZrO₂) based metal-oxide-semiconductor (MOS) structures has been carried out. ZrO₂ films have been atomic layer deposited (ALD) by using novel cyclopentadienyl-based precursors, which have recently revealed themselves as very adequate in terms of thermal stability and high permittivity of the dielectrics deposited. Our results demonstrate good quality of the films, especially when mixed alkylamido-cyclopentadienyl precursors are used on SiO₂/Si substrates. Conduction mechanisms in these MIS capacitors were studied, with moderately or highly-doped silicon used as substrate.     

Electrical characteristics and TDDB breakdown mechanism of N2-RTA-treated Hf-based high-κ gate dielectrics

This study investigates the effects of rapid thermal annealing (RTA) in nitrogen ambient on HfO₂ and HfSiO_x gate dielectrics, including their electrical characteristics, film properties, TDDB reliability and breakdown mechanism. The optimal temperature for N₂ RTA treatment is also investigated. The positive oxide trap charges (oxygen vacancies) in HfO₂ and HfSiO_x dielectric films can be reduced by the thermal annealing, but as the annealing temperature increased, many positive oxide trap charges (oxygen vacancies) with shallow or deep trap energy level will be formed in the grain boundaries, degrading the electrical characteristics, and changing the breakdown mechanism. We believe that variation in the number of positive oxide trap charges (oxygen vacancies) with shallow or deep trap energy levels is the main cause of the CV shift and difference in the breakdown behaviors between HfO₂ and HfSiO_x dielectrics. With respect to CV characteristics and TDDB reliability, the optimal temperature for N₂ RTA treatment is in the range 500-600 °C and 800-900 °C, respectively.     

Effects of annealing conditions on the properties of tantalum oxide films on silicon substrates

The formation of a SiO₂ layer at the Ta₂O₅/Si interface is observed by annealing in dry O₂ or N₂ and the thickness of this layer increases with an increase in annealing temperature. Leakage current of thin (less than 40 nm thick) Ta₂O₅ films decreases as the annealing temperature increases when annealed in dry O₂ or N₂. The dielectric constant vs annealing temperature curve shows a maximum peak at 750 or 800° C resulting from the crystallization of Ta₂O₅. The effect is larger in thicker Ta₂O₅ films. But the dielectric constant decreases when annealed at higher temperature due to the formation and growth of a SiO₂ layer at the interface. The flat band voltage and gate voltage instability as a function of annealing temperature can be explained in terms of the growth of interfacial SiO₂. The electrical properties of Ta₂O₅ as a function of annealing conditions do not depend on the fabrication method of Ta₂O₅ but strongly depend on the thickness of Ta₂O₅ layer.     

Ultrathin HfO2 gate dielectrics on partially strain compensated SiGeC/Si heterostructure

Ultrathin HfO₂ gate dielectrics have been deposited on strain-compensated Si_0.69Ge_0.3C_0.01 layers by rf magnetron sputtering. X-ray diffraction spectra show the films to be polycrystalline having both monoclinic and tetragonal phases. The formation of an interfacial layer has been observed by high-resolution transmission electron microscopy. Secondary ion mass spectroscopy and Auger electron spectroscopy analyses show the formation of an amorphous Hf-silicate interfacial layer between the deposited oxide and SiGeC films. The average concentration of Ge at the interfacial layer is found to be 2–3 at%. The leakage current density of HfO₂ gate dielectrics is found to be several orders of magnitude lower than that reported for thermal SiO₂ with the same equivalent thickness.     

Microstructure of reactively sputtered oxide diffusion barriers

Molybdenum oxide (Mo_1-x O _x ) and ruthenium oxide (RuO₂) films were prepared by rf reactive sputtering of Mo or Ru targets in an O₂/Ar plasma. Both films exhibit metallic conductivities. The influence of the deposition parameters on the phase that forms and on the microstructure of Mo_1-x O _x and RuO₂ films is reported. A phase transformation is observed in Mo_1-x O _x films subjected to heat treatment. The diffusion barrier performance of Mo_1-x O _x and RuO₂ layers interposed between Al and Si is compared.     

Capacitors with an Equivalent Oxide Thickness of <0.5 nm for Nanoscale Electronic Semiconductor Memory

The recent progress in the metal‐insulator‐metal (MIM) capacitor technology is reviewed in terms of the materials and processes mostly for dynamic random access memory (DRAM) applications. As TiN/ZrO₂‐Al₂O₃‐ZrO₂/TiN (ZAZ) type DRAM capacitors approach their technical limits, there has been renewed interest in the perovskite SrTiO₃, which has a dielectric constant of >100, even at a thickness ～10 nm. However, there are many technical challenges to overcome before this type of MIM capacitor can be used in mass‐production compatible processes despite the large advancements in atomic layer deposition (ALD) technology over the past decade. In the mean time, rutile structure TiO₂ and Al‐doped TiO₂ films might find space to fill the gap between ZAZ and SrTiO₃ MIM capacitors due to their exceptionally high dielectric constant among binary oxides. Achieving a uniform and dense rutile structure is the key technology for the TiO₂‐based dielectrics, which depends on having a dense, uniform and smooth RuO₂ layer as bottom electrode. Although the Ru (and RuO₂) layers grown by ALD using metal‐organic precursors are promising, recent technological breakthroughs using the RuO₄ precursor made a thin, uniform, and denser Ru and RuO₂ layer on a TiN electrode. A minimum equivalent oxide thickness as small as 0.45 nm with a low enough leakage current was confirmed, even in laboratory scale experiments. The bulk dielectric constant of ALD SrTiO₃ films, grown at 370 °C, was ～150 even with thicknesses ≤15 nm. The recent development of novel group II precursors made it possible to increase the growth rate largely while leaving the electrical properties of the ALD SrTiO₃ film intact. This is an important advancement toward the commercial applications of these MIM capacitors to DRAM as well as to other fields, where an extremely high capacitor density and three‐dimensional structures are necessary.     

Investigation of high-K gate stacks with epitaxial Gd2O3 and FUSI NiSi metal gates down to CET=0.86 nm

Novel gate stacks with epitaxial gadolinium oxide (Gd₂O₃) high-k dielectrics and fully silicided (FUSI) nickel silicide (NiSi) gate electrodes are investigated. Ultra-low leakage current densities down to 10^–7 A cm^–2 are observed at a capacitance equivalent oxide thickness of CET=1.8 nm. The influence of a titanium nitride (TiN) capping layer during silicidation is studied. Furthermore, films with an ultra-thin CET of 0.86 nm at a Gd₂O₃ thickness of 3.1 nm yield current densities down to 0.5 A cm⁻² at V_g=+1 V. The extracted dielectric constant for these gate stacks ranges from k=13 to 14. These results emphasize the potential of NiSi/Gd₂O₃ gate stacks for future material-based scaling of CMOS technology.     

Formation of aluminum oxide films from aluminum hexafluoroacetylacetonate at 350–450° c

A study of the thermally activated decomposition of Al(hfa)₃ (aluminum hexafluoroacetylacetonate) from the gas phase to form Al₂O₃ on silicon substrates is reported. The decomposition process was carried out in an open tube atmospheric pressure reactor in either argon or oxygen/argon mixtures in the temperature range, 350–450° C. The chemical vapor deposition process resulted in the formation of aluminum oxide films in all instances. The dielectric strength of Al/Al₂O₃/Si capacitors which received a post-metal anneal, but did not receive a high temperature annealing treatment, with aluminum oxide films prepared from Al(hfa)₃ in argon, was found to be in the range 2–6 MV/cm. The difference between the flatband voltage of the MOS structures and the metal-silicon work function difference was positive, indicative of a net negative oxide charge with a density of approximately 3 × 10¹¹ – 3 × 10¹² cm^-2, assuming the charge is located at the oxide-silicon interface. Decomposition of Al(hfa)₃ was also carried out in oxygen/argon mixtures with the oxygen concentration in the range 10–60 vol %. This process led to the deposition of aluminum oxide films with breakdown fields in the range 8–9 MV/cm. However, the flatband voltages of the Al/Al₂O₃/Si capacitors were even more positive than those obtained with Al₂O₃ formed in pure argon. High temperature (800–1000° C) oxygen or nitrogen annealing treatments of alumina films deposited in either argon or oxygen/argon mixtures were evaluated from the point of view of their influence on the oxide film properties. In particular, an annealing process in oxygen at 1000° C for 15 min was found to result in a reduction of the net negative oxide charge, and an improvement of the dielectric strength of films deposited in argon. Films formed in oxygen/argon mixtures did not change appreciably following oxygen annealing, as far as breakdown fields are concerned, but the oxide net negative charge was reduced. As in an earlier study by the authors, of copper film deposition from Cu(hfa)₂, it was found that essentially carbon free films could be obtained under appropriate conditions.