共查询到20条相似文献,搜索用时 265 毫秒
1.
2.
3.
本文研究了一种二极管箝位型混合级联型多电平逆变器的混合调制方法。逆变器由一个二极管箝位型逆变器和一个H桥单元级联组合而成,每个单元采用不同的独立直流电源,此结构还可以扩展到与多个H桥单元级联。相较于传统级联型多电平逆变器,在输出相同电平的情况下,这种逆变器使用较少的开关器件和较少的独立电源即可实现,从而简化了电路,降低了成本。由于使用了混合调制方式,可以使二极管箝位型逆变器工作在低频状态,而传统H桥逆变器工作在高频状态,从而可以在不同逆变器中使用不同的开关设备,并可以有效避免功率倒灌现象的发生。 相似文献
4.
5.
在中高压大功率场合级联H桥多电平逆变器受到了越来越多的关注。混合级联多电平逆变器是传统级联多电平逆变器拓扑的改进,它的直流侧电压幅值不同。混合级联多电平逆变器最大的优点是在得到相同电平数目的情况下,大大减少了独立直流电源的数目。但是,在一些应用场合,直流电源只能为一个。针对这个问题,在直流侧加入高频环节,得到了一种新型的混合级联多电平逆变器,实现了单直流电源供电,而且这种逆变器的输出电压THD较低,系统体积小。文中首先介绍了基于高频环节混合级联多电平逆变器的电路结构,分析了该结构功率分布问题,针对最近电平逼近调制策略下的输出电压低次谐波较大的问题,改进了控制方法,最后通过软件仿真验证了改进控制方法的可行性。 相似文献
6.
在传统的级联式多电平变换器的基础上提出了一种混合主从级联式变换器。该变换器由一个传统的非对称三电平H桥和一个对称的H桥级联构成。非对称H桥作为主变流单元由直流电源直接供电;而对称的H桥作为从变流单元由一个悬浮电容提供能量。与传统的级联多电平变流器相比,在输出相同电平的情况下需要较少的器件。文中详细分析了该拓扑的工作原理和悬浮电容电压平衡的方法,并在Matlab/Simulink中进行了仿真分析。最后制作了一台实验装置,并通过现场可编程门阵列FPGA(field programmable gate array)对该实验装置实现了实时控制,通过仿真和实验结果的对比,验证了理论分析的正确性。 相似文献
7.
本文介绍了一种新型级联型多电平逆变器拓扑结构,并对其PWM调制算法进行了仿真研究。该拓扑电路与传统的H桥级联型多电平逆变器相比,可以用相对较少的电力电子开关器件实现多电平的输出。该拓扑电路由一系列电平变换单元级联而成,可以减少开关器件的数目及其功率损耗、减小逆变电路的体积、提高逆变效率并具有相对简单的控制系统。最后基于Matlab/Simulink对该拓扑结构的PWM调制方法进行了仿真,仿真结果验证了该拓扑结构的正确性与优越性。 相似文献
8.
《电力系统及其自动化学报》2017,(9)
针对半桥级联多电平逆变器拓扑结构,提出了与之相适应的调制方法。该拓扑结构与传统的H桥级联多电平逆变器相比,在基本单元级联数目相同的条件下,具有输出更多电平等级,减少电力电子开关器件数目等优点。以对称的3个功率单元和非对称的两个功率单元为例,分别对两种不同的调制方法进行了理论分析和仿真验证。仿真结果验证了该拓扑结构的优越性及其调制方法的可行性。 相似文献
9.
针对传统的多电平逆变器存在有源器件数量较多、电容电压不平衡、结构复杂以及电压增益低的问题,提出一种降低器件数量且可扩展的多电平逆变器。该逆变器由开关电容单元和两个半桥组成,使用1个直流电源、3个电容、13个开关管,实现4倍电压增益和九电平交流输出电压。该逆变器通过2个半桥代替后端H桥转换输出电压极性,可以有效降低开关管总电压应力。在所提逆变器的扩展结构中,电容逐级充电的工作方式进一步提高了电压增益和输出电平数。首先,详细阐述了所提逆变器的工作模式、调制策略、电容分析、电压应力计算和电路参数设计。然后,与其他类似多电平逆变器进行了比较。最后,通过仿真与实验验证了所提逆变器的可行性和理论分析的正确性。 相似文献
10.
针对级联H桥型多电平逆变器开关器件随逆变器输出电平数增加显著增多的问题,提出一种以功率开关器件-二极管为基本单元的新型多电平逆变器。该逆变器仅使用较少开关器件即可实现高质量电平输出,且该拓扑开关损耗低、效率高,不仅易于扩展还能有效避免级联单元间电流倒灌等问题。针对传统正负反向层叠载波调制策略调制下逆变器存在级联单元间输出功率不均衡的问题,在传统调制策略基础上推导分析区域功率,提出了一种基于部分载波循环的功率均衡调制策略,并验证了载波循环规律的普适性,所提调制策略能在保持输出电压波形质量不变的情况下,载波仅变换2(n-1)次即可在nTo/2内实现级联单元输出功率均衡以及开关损耗平均分配,并提高电源利用率。最后搭建两单元七电平逆变器实验平台对所提调制策略进行了实验验证。 相似文献
11.
Ajaykumar T Nita R. Patne 《International Journal of Circuit Theory and Applications》2019,47(10):1615-1629
This paper proposes a fault-tolerant switched capacitor (SC)–based boost multilevel inverter. The proposed inverter is able to convert a low-level dc voltage into a desired ac output voltage in single-stage power conversion. It can accomplish a high voltage gain by using multiple SC cells arrangement at reduced voltage stresses on the switching devices and passive circuit elements in the boost network. The principle of operation and steady-state analysis of the proposed topology are presented to formulate the mathematical relationship between input dc and output ac voltage. In addition to that, the proposed inverter can also provide reliable electrical power supply at prescribed ac output voltage in the event of open-circuit failure of power switches. The fault tolerability is realized by reconfiguring the pulse width modulation (PWM) control scheme, whereas the reduction in output voltage is compensated by the boosting characteristic of the inverter. The effectiveness of the proposed inverter has been compared with other impedance source multilevel inverters in terms of voltage gain, boosting capability, and voltage stresses. A laboratory prototype of the proposed inverter is developed for experimentation, and its operation is validated by simulation and experimental results. 相似文献
12.
This paper proposes a novel current‐source multilevel inverter, which is based on a current‐source half‐bridge topology. Multilevel inverters are effective for reducing harmonic distortion in the output voltage and the output current. However, the multilevel inverters require many gate drive power supplies to drive switching devices. The gate drive circuits using a bootstrap circuit and a pulse transformer can reduce the number of the gate drive power supplies, but the pulse width of the output PWM waveform is limited. Furthermore, high‐speed power switching devices are indispensable to create a high‐frequency power converter, but various problems, such as high‐frequency noise, arise due to the high dv/dt rate, especially in high‐side switching devices. The proposed current‐source multilevel inverter is composed of a common emitter topology for all switching devices. Therefore, it is possible to operate it with a single power supply for the gate drive circuit, which allows stabilizing the potential level of all the drive circuits. In this paper, the effectiveness of the proposed circuit is verified through experimental results. © 2008 Wiley Periodicals, Inc. Electr Eng Jpn, 166(2): 88–95, 2009; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.20475 相似文献
13.
Farzad Sedaghati Seyed Hadi Latifi Majareh 《International Journal of Circuit Theory and Applications》2019,47(7):1152-1172
In this paper, a multilevel inverter based on cascade connection of new submultilevel inverters is presented. The suggested submultilevel inverter is constructed using series connection of basic switching units. The proposed multilevel inverter uses fewer power switches in comparison with some similar topologies which results in reduction of switch gate drivers and also converter size and cost. The proposed multilevel inverter can be implemented in both symmetric and asymmetric configurations. The multilevel inverter configuration and operation principle are described in detail, and then, design methods of symmetric and asymmetric configurations are given. Determination of the optimal number of basic units and cascaded submultilevel inverters regarding criteria such as number of switches and total blocking voltage (TBV) of switches is studied. Power losses of the proposed multilevel inverter are calculated, and then, its symmetric and asymmetric configurations are compared with each other and also with similar cascaded multilevel inverters in various items. The validity of the suggested cascaded multilevel inverter is verified using both computer simulations and laboratory prototype implementation. 相似文献
14.
Multilevel inverters have very attractive features, such as lower harmonics in the output, lower EMI, and reduction of the required voltage rating of power semiconductor devices. Among them, lower harmonics in the output can reduce the volume of the output harmonic filter and additional losses caused by the harmonics. Therefore, multilevel inverters are expected to realize higher power density and higher efficiency. In this paper, as a basis of the quantitative investigation of these features, the harmonics in the PWM output voltage of multilevel inverters are analyzed theoretically. As an application of the theoretical results, the usefulness of the theoretical results is verified by the prediction of the harmonic contents of the load current. 相似文献
15.
16.
17.
一类新型的单相直接式电流型多电平变流器拓扑 总被引:7,自引:3,他引:4
目前的多电平变换技术主要是针对电压型逆变器.随着超导储能技术的发展,电流型逆变器的储能效率问题必将得到解决,电流型多电平逆变器也将得到广泛应用.文中提出了一类新型单相直接式电流型多电平拓扑.该类拓扑结构非常简单,所用开关器件和均流电感的数目非常少.文中分析了由该类拓扑组成的单相五电平、七电平变流器的工作原理,并研究了它们在感性负载和容性负载时的变流器输出波形.针对该类拓扑,还给出了一种通过调节输出电平宽度消除低次电流谐波的方法.仿真和实验结果验证了新拓扑的正确性和谐波消除法的可行性. 相似文献
18.
用于级联型多电平变换器的新型脉宽调制方法 总被引:4,自引:2,他引:2
提出一种用于级联型多电平变换器的新型脉宽调制(pulse width modulation,PWM)方法,即将单个三角载波信号与多个梯形波调制信号进行规则对称采样。推导了梯形波边坡角与输出基波幅值和谐波含量的关系。与其他常用的PWM方法相比,该方法调制下的输出基波幅值更高,在选取适当的边坡角后,输出波形的谐波特性非常好。以5电平和13电平级联型多电平变换器为控制对象,对所提出的PWM方法进行了仿真验证,证明其在输出电压幅值和谐波特性方面具有优良的性能。 相似文献
19.