End-Effectors for Tomato Harvesting Robot

Two types of robotic end-effectors capable of harvesting tomato fruits were manufactured based on the physical properties of tomato plant and tested. The first prototype end-effector consisted of two parallel plate fingers and a suction pad. The fingers pick a fruit off at the joint of its peduncle after the suction cup singulates it by vacuum from other fruits in the same cluster. From the results of harvesting experiment, the end-effector could not harvest fruits with a short peduncle because the fruits were detached from the suction pad before they were gripped by the fingers. Therefore, the second prototype in which the functions to detect the fruit position and the air pressure in the pad were installed, was made, so that the fruits were harvested regardless of the length of their peduncle. Experimental results using the improved end-effector showed that the fruits were harvested successfully with no damage.     

汉英篇章结构平行语料库的对齐标注研究

篇章结构平行语料库是对具有对译关系的双语文本标注了平行篇章结构信息的语料库。对齐标注是汉英篇章结构平行语料库的核心理论基础。该文提出“结构对齐,关系对齐”的对齐标注策略,应用于切分对齐、层次结构对齐、关系对齐、中心对齐等环节,实现了对齐和标注并行、单位对齐和结构对齐共进的平行语料库工作模式。本策略辅之以相应标注平台和工作程序以及相应难点解决方案,被证明是一种高效的篇章结构平行语料库工作方式。     

基于FPGA的AVS编码器帧内预测实现

针对帧内预测的快速算法,由于DSP架构软件顺序执行的局限性难以满足实时性要求,而FPGA以其高速的计算速度和强大的并行处理能力成为H.264和AVS编解码的理想平台。本文在FPGA平台上采用资源共享、高并行和多流水线结构实现了亮度帧内预测算法。该方法在分析AVS帧内亮度5种预测模式的基础上,将像素预测与模式判决在一个模块中完成,并且利用各模式预测的相似性,实现运算单元共享和多种模式并行执行,兼顾了处理速度和实现代价。仿真及综合结果表明该设计能够完全满足标清(704×576,30f/s)数字视频的实时处理要求。     

基于分布式计算的月度机组组合高效算法设计

月度机组组合是电力系统运行方式安排的重要内容。随着电网规模的不断扩大,月度机组组合计算规模快速增加。传统的月度机组组合计算方法在计算效率上已不能满足当前系统要求。为此,介绍了分布式计算基本概念,提出了一种基于混合维度粒子群算法的分布式计算方法。根据月度机组组合模型实际,设计了面向月度机组组合问题的分布式高效计算方法,通过将传统串行计算转换为并行计算,提升了整体计算效率。最后基于某电网实际构造算例,验证了本文所提出方法的有效性。     

基于多源数据的电网一次调频能力平行计算研究

为解决电网一次调频性能难以估计的问题, 本文提出了基于多源数据的电网一次调频性能平行计算平台. 通过采集整合OMS (Operations management system)、WAMS (Wide area measurement system)、SCADA (Supervisory control and data acquisition)等系统的各类型一次调频数据, 以极大似然估计、数值拟合等方法构建机组一次调频性能功频图谱. 采用均方差分析建立电网一次调频性能数学模型, 基于并网运行机组的一次调频性能功频图谱, 估算出当前电网的实际一次调频性能. 算例计算表明, 本文所提出的计算方法能够有效兼顾机组类型的静态特性和运行工况的动态特性, 并以平行执行方式完成人工估算系统与实际电力系统的滚动优化, 实现了电网一次调频性能的在线全面估计, 为电网频率管理与控制提供数据决策支持.     

Two-dimensional online bin packing with rotation

In two-dimensional bin packing problems, the input items are rectangles which need to be packed in a non-overlapping manner. The goal is to assign the items into unit squares using an axis-parallel packing. Most previous work on online packing concentrated on items of fixed orientation, which must be assigned such that their bottom side is parallel to the bottom of the bin. In this paper we study the case of rotatable items, which can be rotated by ninety degrees. We give almost tight bounds on the (asymptotic) competitive ratio of bounded space bin packing of rotatable items, and introduce a new unbounded space algorithm. This improves the results of Fujita and Hada.     

Hardware Support for Interval Arithmetic

A hardware unit for interval arithmetic (including division by an interval that contains zero) is described in this paper. After a brief introduction an instruction set for interval arithmetic is defined which is attractive from the mathematical point of view. These instructions consist of the basic arithmetic operations and comparisons for intervals including the relevant lattice operations. To enable high speed, the case selections for interval multiplication (9 cases) and interval division (14 cases) are done in hardware. The lower bound of the result is computed with rounding downwards and the upper bound with rounding upwards by parallel units simultaneously. The rounding mode must be an integral part of the arithmetic operation. Also the basic comparisons for intervals together with the corresponding lattice operations and the result selection in more complicated cases of multiplication and division are done in hardware. There they are executed by parallel units simultaneously. The circuits described in this paper show that with modest additional hardware costs interval arithmetic can be made almost as fast as simple floating-point arithmetic.     

Method of adaptive controllable parallel execution of operations in object database management systems

The design of parallel database management systems (DBMSs) normally implies using special-purpose multiprocessor computing systems. Most often, a DBMS is supposed to work in an exclusive mode of operation. However, in the class of x86-based multiprocessor computing systems designed for mass usage, the exclusive mode of DBMS operation with respect to other software is often not secured. In addition, the legacy software for this class of computing systems is often not designed for mass parallel usage. When the exclusive mode requirement is ignored and the resources of the computing system are not used in low-load DBMS regimes, the efficiency of using resources of the computing system as a whole reduces. This paper considers a method of program organization of controlled parallelism at the level of internal DBMS operations, allowing for their controlled execution based on the state of the entire computing system. This method made it possible to significantly reduce the time of response for low densities of query arrival in the ODB-Jupiter commercial object DBMS developed in the Inteltec Plus scientific manufacturing center. The method of controlled parallel execution can be used in a wide class of program systems.     

四旋翼无人机的多模型故障诊断

四旋翼无人机是一个强耦合非线性被控对象,准确地判断故障情况,并及时调整控制器参数对无人机的安全飞行具有重要的意义。针对四旋翼无人机的执行器部分失效故障,提出了一种多模型在线故障诊断方法。该方法根据不同故障模式建立故障模型集,通过模型集的并联运行对无人机工作模式进行在线监测。仿真结果表明,对于单旋翼执行器部分失效故障,该方法能够快速准确地获得故障模型参数。     

基于TVM平台的MEC卷积算法优化

针对MEC(memory efficient convolution)卷积算法在传统设备下因访问数据地址不连续导致的缓存命中率低、内存访问延时长等问题,提出一种适用于MEC算法访存行为的优化方法。该方法分为中间矩阵转换和矩阵运算两部分。对于中间矩阵转换部分,采用修改数据读取顺序的方式对其进行优化,使读取方式符合算法的访存行为。对于矩阵运算部分,采用更加适合矩阵运算的内存数据布局对卷积核矩阵修改,并利用TVM(tensor virtual machine)平台封装的计算函数,重新设计中间矩阵同卷积核矩阵的计算方式。使用平台自带并行库对运算过程进行加速。实验结果表明,相比传统MEC算法,提出的优化方法可以有效解决缓存命中率低、内存访问延时长等问题,同MEC算法的运算时间对比,在单个卷积层上平均获得了50%的速度提升,在多层神经网络中最低获得了57%以上的速度提升,同空间组合算法的运算时间对比,最高获得了80%的速度提升。     

基于行的小波变换及其在图像压缩中的应用

由于基于行的小波变换编码是以累进方式来完成列向的小波变换，其可在不影响小波变换结果的前提下，降低对存储容量的需求，为此提出用改进的提升格式进行小波变换来替代原算法中的Mallat算法。以加快算法的执行速度。该提升格式是以三项加法单元的形式实现，进而把三项加法单元分成两个两项加法单元，以进一步节省存储空间，但是，对于每个单元，却增加了一个乘法运算，从而计算量增大了。相对于三项加法单元采用一个模式即可求出一组低通滤波结果和高通滤波结果来说，两项加法单元对于低通滤波和高通滤波则由于要采用不同的计算步骤，因而实现时更复杂一些。     

Prediction and Abnormality Assertion on Emu Brake Pad Based on Multivariate Integrated Random Walk

To better solve the issue with abnormal failure of electric motor unit (EMU) brake pad resulted from various random factors in the ever-changing operating environment, in this paper, a new evaluation method of performance prediction and abnormity decision is proposed based on the Multivariate integrated random walk (MIRW) model. In this method, the state space model of the EMU brake pad performance degradation is firstly established. And then based on the observed data, the brake pad performance degradation trend is extracted by the fixed interval forward - backward smoothing algorithm. Based on it, the future degradation state can be predicted by Kalman predictor. Based on the obtained state estimation values, abnormal failure tolerance range (AFTR) can be determined applying Grubbs criterion to judge whether the brake pad is being in abnormal state before reaching the final failure or not as a new sample appears. In addition, the cumulative failure probability of the brake pad is estimated in the degradation process. Finally, the thickness data of a certain type of EMU brake pad is applied to predict the future degradation state and determine the abnormal condition, and the result shows that the proposed method is more efficient and accurate.     

非规则流中高维数据流典型相关性分析并行计算方法

为了满足在计算资源受限的环境下高维数据流处理的实时性要求,提出一种方法——基于GPU(graphic processing unit)的非规则流中高维数据流的处理模型和具体的可行架构,并分析设计了相关的并行算法.该六层模型是将GPU处理数据的高宽带性能结合进滑动窗口中数据流的分析,进而在该框架下基于统一计算设备架构(compute unified device architecture,简称CUDA),使用数据立方模型以及降维约简技术并行分析了多条高维数据流的典型相关性.理论分析和实验结果均表明,该并行处理方法能够在线精确地识别同步滑动窗口模式下高维数据流之间的相关性.相对于纯CPU方法,该方法具有显著的速度优势,很好地满足了高维数据流的实时性需求,可以作为通用的分析方法广泛应用于数据流挖掘领域.     

Optimizing the parallel computation of linear recurrences using compact matrix representations

This paper presents a novel method for optimizing the parallel computation of linear recurrences. Our method can help reduce the resource requirements for both memory and computation. A unique feature of our technique is its formulation of linear recurrences as matrix computations, before exploiting their mathematical properties for more compact representations. Based on a general notion of closure for matrix multiplication, we present two classes of matrices that have compact representations. These classes are permutation matrices and matrices whose elements are linearly related to each other. To validate the proposed method, we experiment with solving recurrences whose matrices have compact representations using CUDA on nVidia GeForce 8800 GTX GPU. The advantages of our technique are that it enables the computation of larger recurrences in parallel and it provides good speedups of up to eleven times over the un-optimized parallel computations. Also, the memory usage can be as much as nine times lower than that of the un-optimized parallel computations. Our result confirms a promising approach for the adoption of more advanced parallelization techniques.     

Generic LR fuzzy cells for fuzzy hardware synthesis

A novel primitive cell structure for high-performance hardware realization of fuzzy computations is proposed in this paper. Such a cell structure is called generic LR fuzzy cell because it is an integral unit that encapsulates an LR fuzzy set and a basic fuzzy operation such as implication or arithmetic operation. Based on the proposed cell structure, we can develop two major kinds of fuzzy cell-LR fuzzy implication cell and LR fuzzy arithmetic cell-for the systematic synthesis of fuzzy application specific integrated circuits (ASICs) or general purposed fuzzy processors. The fuzzy systems synthesized with LR fuzzy cells possess the characteristics of decentralized knowledge manipulations and massively parallel inference. The system expandability and reconfigurability are also warrantable. This paper emphasizes on the design and application of fuzzy implication cell. The LR fuzzy implication cell is implemented with analog current mode technology. By this technology, an implication cell has the characteristics including small circuit area, high performance, low-power dissipation, etc. Moreover, the implication cell manipulates continuous data so that the realization of a pure fuzzy system is possible. In this paper, the key circuit characteristics of fuzzy implication cell are evaluated in details and there are two cases-fuzzy knowledge system and fuzzy mean filter-implemented to confirm the effectiveness and efficiency of fuzzy hardware synthesis by the LR fuzzy cells     

基于聚类模式的推荐算法研究

经典的协作式过滤算法基于记忆的非参数局部模型,该模型应用最近邻算法（K-nearest neighbors,KNN）技术,把目标用户近邻对于目标推荐项的喜好,作为向该用户进行有效推荐的标准。该方法在预测时需要较长的运算时间,并且在特定参数的限制下,不能保证对所有的用户进行有效预测。为了解决以上问题,介绍1种基于聚类模式的新的推荐方法。该算法首先假设目标用户和推荐项均能以一定的概率划归于不同的用户模式和推荐项模式中;通过计算各个用户模式对于各个推荐项模式的评分,以及用户属于不同用户模式的概率,推荐项属于不同项目模式的概率;从而产生目标用户对于具体推荐项的预测评分。通过与经典的协作式过滤推荐算法结果的对比,该方案可以在较短的时间预测所有用户对于所有推荐项的评分,并且其推荐效果与其他方法对比有了很好的改进。     

某火电厂厂级AGC改造

本文从六个方面分析单机AGC存在的问题,指出该方式增加了电厂的整体煤耗、电耗,影响机组的经济性和安全性;阐述厂级AGC原理、系统结构及主要功能,厂级AGC能根据各台机组的煤耗率、响应速率、调节范围、运行工况等,自动合理地进行全厂机组最优化负荷分配,有效降低发电成本,促进机组高效、经济运行;所以进行厂级AGC改造非常必要。从负荷上升、下降、稳定三种情况讲解厂级AGC的分配策略,提出厂级AGC改造必须坚持的原则;对改造后的运行方式进行总结,从单机指令跳变、单机指令为零、自动退出厂级AGC三种现象进行原因分析并提出解决办法,对厂级AGC负荷安排作出要求,通过优化机组带负荷的运行方式,提高机组经济性,最后介绍了改造后的运行效果,对发电企业多台机组的厂级AGC改造有较强的指导意义。     

一种在多核嵌入式平台上实现FFT的快速并行算法

快速傅利叶变换（fast Fourier transform,FFT）算法是对实时数字信号进行快速分析处理的一个基本方法。针对多核嵌入式实时环境下并行FFT算法进行了研究,以有效提高实时信号处理的速度。提出了一种新的静态多项式FFT算法,充分利用静态多项式奇偶项的不同特点直接代入数据计算,免去了层层迭代的计算过程,减少了运算过程中的通信提高并行性能。对该算法思想本文在理论进行了严密论证,通过嵌入式实时平台上运行测试和仿真实验,证实了在数据分段较短的约束条件下,该多项式静态算法较经典的FFT并行算法在时间复杂度上有一定优势。本文结论:多项式静态FFT算法能够有效提高并行FFT运行速度。     

High speed flexible fuzzy hardware for fuzzy information processing

In this paper, we present a system called KAFA (Kaist Fuzzy Accelerator) which provides various fuzzy inference methods and fuzzy set operations. The basic idea of this study is to develop a more general purpose hardware system. The architecture has SIMD structure, which consists of two parts; a system control unit (main controller), and an arithmetic unit (fuzzy processing element (FPE)). Microinstruction codes are defined and any fuzzy operation can be programmed by using these microinstructions. Each FPE has the maximum speed of 10 M FLOPS. As the KAFA contains 128 FPE's, if a fuzzy set consists of 128 elements, we achieve the peak performance of 10 M FSOPS (fuzzy set operation per second) under 10 MHz clock frequency. This system also includes the parallel algorithms for defuzzification on the SIMD mode architecture using KAFA network. The prototype of the proposed architecture was developed with the FPGA chips. The speed of the KAFA holds promise for the development of the new fuzzy application system such as automatic control, fuzzy expert systems, real time systems and fuzzy databases