The Problem with Disruption

Back in January 1995 Clayton Christensen and Joseph Bower wrote an article, Disruptive Technologies: catching the wave, in the Harvard Business Review, in which they argued: No matter the industry, a corporation consists of business units with finite life spans: the technological and market bases of any business will eventually disappear. Good businesses will often be adept at managing a process of incremental improvement, but this kind of incremental change, what they call sustaining technologies, is not the focus of this paper but rather disruptive technologies, which change the rules and leave established businesses with nowhere to go.     

Performance Monitoring for In-life Capacity Management

The key to providing a meaningful management view of the performance of complex systems lies in having a co-ordinated process for data collection, analysis and presentation. TeleMarketing Services, such as the Freefone service, provide a good example. Managers of diverse, remote subsystems receive summarised performance and customer service information, mostly in the form of simple graphs, in exchange for providing reliable data. The aim is to bring together a structured view of all the components, including a red-amber-green status table, for use by senior customer-facing staff. Generally, the analyses focus on capacity, forecast and measurement, covering a flexible range of parameters. Managers then have an early view of service degradation, potential capacity exhaustion, workload imbalance and resource wastage, enabling timely remedial action, fault clearance and system enhancements.     

On the design of feedback controllers to achieve prescribed initial value constraints

The problem of designing a stabilizing compensator for a control system to achieve prescribed initial value constraints ⁽ⁱ⁾(0⁺)=y_i is considered. Indeed, modulo certain technical conditions, such a compensator exists if and only if y_i=0;i= 0,1,...,rp +rt –2; whererp is the relative degree of the plant andrt is the relative degree of the system input. This theorem is derived and a complete parameterization of the set of compensators that achieve the prescribed design constraints is formulated.This research was supported in part by NSF Grant No. 921106.     

Scheduling and bandwidth allocation for the distribution of archived video in VOD systems

Providing costeffective videoondemand (VOD) services necessitates reducing the required bandwidth for transporting video over highspeed networks. In this paper, we investigate efficient schemes for transporting archived MPEGcoded video over a VOD distribution network. A video stream is characterized by a timevarying traffic envelope, which provides an upper bound on the bit rate. Using such envelopes, we show that video streams can be scheduled for transmission over the network such that the perstream allocated bandwidth is significantly less than the source peak rate. In a previous work [13], we investigated stream scheduling and bandwidth allocation using global traffic envelopes and homogeneous streams. In this paper, we generalize the scheduling scheme in [13] to include the heterogeneous case. We then investigate the allocation problem under windowbased traffic envelopes, which provide tight bounds on the bit rate. Using such envelopes, we introduce three streamscheduling schemes for multiplexing video connections at a server. The performance of these schemes is evaluated under static and dynamic scenarios. Our results indicate a significant reduction in the perstream allocated bandwidth when stream scheduling is used. While this reduction is obtained through statistical multiplexing, the transported streams are guaranteed stringent, deterministic quality of service (i.e., zero loss rate and small, bounded delay). In contrast to video smoothing, our approach requires virtually no buffer at the settop box since frames are delivered at their playback rate.     

Theory of PLL fractional-N frequency synthesizers

This paper presents an overview of the evolution of frequency synthesizers based on phase-locked loops (PLLs). The main limitations of the digital PLLs are described, and the consequent necessity of using fractional-N techniques is justified. The origin of the typical spurious noise lines on the sidelobes of the synthesized frequency is explained. It is shown how to eliminate these spurious noise lines by using digital modulators to control the frequency division value. Finally, the implications of using digital modulators together with fractional-N PLLs on the output phase noise are analysed.     

Why ‘Current Mode’ Does Not Guarantee Good Performance

It is often said that there is a fundamental difference between current-mode and voltage-mode circuits. This conjecture is discussed in technical and philosophical terms, and it is shown that there is no such performance difference to be found, and that it is not possible to make a clear divide between voltage mode and current mode.And yet performance differences appear in the literature. It is shown that they come from the different design practices of the current-mode and the voltage-mode research groups. The conclusion of this paper is that the practical knowledge of the current-mode research groups should be re-integrated into main-stream IC design, and that all propaganda of the type current-mode is better than voltage-mode should be stopped immediately.     

The Supply Chain

One of the most visible examples of ubiquitous computing poised for implementation can be found in the retail industry. Radio frequency identification (RFID) tags are being billed as the replacement for barcoding, the all-pervasive technology which has underpinned supply chains for the past 35 years. The standards allow for up to thirty trillion, trillion, trillion unique addresses, and the ultimate goal is to create an Internet of things in which everyday physical items are networked together. Concerted research effort over the past five years has developed the technology and reduced cost to a point where deployment is now possible. However, the recent heated debate centred on spy chips has highlighted the fact that one person's ubiquitous computing is another person's Big Brother state.     

Symmetry relations in multidimensional Fourier transform pairs

A relation between the types of symmetries that exist in signal and Fourier transform domain representations is derived for continuous as well as discrete domain signals. The symmetry is expressed by a set of parameters, and the relations derived in this paper will help to find the parameters of a symmetry in the signal or transform domain resulting from a given symmetry in the transform or signal domain respectively. A duality among the relations governing the conversion of the parameters of symmetry in the two domains is also brought to light. The application of the relations is illustrated by a number of two-dimensional examples.Notation R the set of real numbers - R ^m R × R × ... × R m-dimensional real vector space - continuous domain real vector - L {¦ – _i , i = 1,2,..., m} - m-dimensional frequency vector - W { – _i ,i=1,2,..., m} - m-dimensional normalized frequency vector - _P {¦ – _i , i=1,2,...,m} - g(ol) g (₁,₂,..., _m ) continuous domain signal - () ( _{1 2},..., _m )=G (j ₁,j ₂,..., j _m ) Fourier transform ofg (ol) - (A,b,,,) parameters ofT- symmetry - N the set of integers - N ^m N × N × ... × N m-dimensional integer vector spacem-dimensional lattice - h(n) h (n ₁,.,n _m ) discrete domain signal - H() Fourier transform ofh (n) - v ₁,v ₂,..., v_m m sample-direction and interval vectors - V (v ₁ v ₂ ...v _m ) sampling basis matrix - [x]^* complex conjugate ofx - detA determinant ofA - X {x¦ – x _i , i=1,2,..., m} - A ^–t [A ^–1] ^t ,t stands for transpose This work was supported in part by the Natural Sciences and Engineering Research Council of Canada under Grant A-7739 to M. N. S. Swamy and in part by Tennessee Technological University under its Faculty Research support program to P. K. Rajan.     

Parametric toeplitz systems

This paper investigates the properties of the two-variable polynomialu (, z) built on the first column of the adjoint matrix ofI -C, whereC is a given Hermitian Toeplitz matrix. In particular, the stability properties ofu (,z) are discussed and are shown to depend essentially on the location of X with respect to the eigenvalues ofC. The eigenvectors ofC, which have recently found some applications in signal processing and estimation theory, are obtained from the polynomialu(,z) when tends to the eigenvalues ofC. This allows one to derive several results concerning the eigenpolynomials, including those for the case of multiple eigenvalues.     

On the distribution of characteristics in bijective mappings

Differential cryptanalysis is a method of attacking iterated mappings based on differences known as characteristics. The probability of a given characteristic is derived from the XOR tables associated with the iterated mapping. If is a mapping : Z ₂ ^m , then for each , X, Y Z ₂ ^m the XOR table for gives the number of input pairs of difference X=X+X for which gp(X)+(X)=Y.The complexity of a differential attack depends upon two properties of the XOR tables: the density of zero entries in the table, and the size of the largest entry in the table. In this paper we present the first results on the expected values of these properties for a general class of mappings . We prove that if : Z ₂ ^m Z ₂ ^m is a bijective mapping, then the expected size of the largest entry in the XOR table for is bounded by 2m, while the fraction of the XOR table that is zero approaches e ^–1/2=0.60653. We are then able to demonstrate that there are easily constructed classes of iterated mappings for which the probability of a differential-like attack succeeding is very small.The author is presently employed by the Distributed System Technology Center, Brisbane, Australia.     

Quality Determination for Gate Delay Fault Tests Considering Three-State Elements

Most industrial digital circuits contain three-state elements besides pure logic gates. This paper presents a gate delay fault simulator for combinational circuits that can handle three-state elements like bus drivers, transmission gates and pulled busses. The well known delay faults--slow-to-rise and slow-to-fall--are considered as well as delayed transitions from isolating signal state high impedance to binary states 0 and 1 and vice versa. The presented parallel delay fault simulator distinguishes between non-robust, robust and hazard free tests and determines the quality of a test. Experimental results for ISCAS85/89 benchmark circuits are presented as well as results for industrial circuits containing three-state elements.     

Surface-Photovoltage Measurement of Volume Electron Lifetime in p-Si Wafers

The problem of estimating the volume lifetime _v of minority carriers in p-type Si wafers by surface-photovoltage measurements is addressed. An experiment is conducted in order to ascertain the relationship between measured and actual values of _v. The measurements are carried out on circular specimens whose thickness is reduced from about 2000 to 450 m by stepwise etching. The specimens are cut from a Czochralski-grown rod, their actual values of _v ranging from 10 to 300 s. The surface recombination rate of minority carriers is determined on both sides of the specimens covered with native oxide, the sides differing in surface finish. The results of the experiment allow one to determine _v up to about 400 s.     

SRAM-Based FPGAs: Testing the Embedded RAM Modules

This paper addresses the problem of testing the RAM mode of the LUT/RAM modules of configurable SRAM-based Field Programmable Gate Arrays (FPGAs) using a minimum number of test configurations. A model of architecture for the LUT/RAM module with N inputs and 2N memory cells is proposed taking into account the LUT and RAM modes. Targeting the RAM mode, we demonstrate that a unique test configuration is required for a single module. The problem is shown equivalent to the test of a classical SRAM circuit allowing to use existing algorithms such as the March tests. We also propose a unique test configuration called pseudo shift register for an m × m array of modules. In the proposed configuration, the circuit operates as a shift register and an adapted version of the MATS++ algorithm called shifted MATS++ is described.     

Detection of Defects Using Fault Model Oriented Test Sequences

This paper analyzes the possibilities and limitations of defect detection using fault model oriented test sequences. The analysis is conducted through the example of a short defect considering the static voltage test technique. Firstly, the problem of defect excitation and effect propagation is studied. It is shown that the effect can be either a defective effect or a defect-free effect depending on the value of unpredictable parameters. The concept of Analog Detectability Interval (ADI) is used to represent the range of the unpredictable parameters creating a defective effect. It is demonstrated that the ADIs are pattern dependent. New concepts (Global ADI, Covered ADI) are then proposed to optimize the defect detection taking into account the unpredictable parameters. Finally, the ability of a fault oriented test sequence to detect defect is discussed. In particular, it is shown that the test sequence generated to target the stuck-at faults can reasonably guarantee short defect detection till a limit given by the Analog Detectability Intervals.     

The effects of asymmetry on TCP performance

In this paper, we study the effects of network asymmetry on endtoend TCP performance and suggest techniques to improve it. The networks investigated in this study include a wireless cable modem network and a packet radio network, both of which can form an important part of a mobile ad hoc network. In recent literature (e.g., [18]), asymmetry has been considered in terms of a mismatch in bandwidths in the two directions of a data transfer. We generalize this notion of bandwidth asymmetry to other aspects of asymmetry, such as latency and mediaaccess, and packet error rate, which are common in widearea wireless networks. Using a combination of experiments on real networks and simulation, we analyze TCP performance in such networks where the throughput achieved is not solely a function of the link and traffic characteristics in the direction of data transfer (the forward direction), but depends significantly on the reverse direction as well. We focus on bandwidth and latency asymmetries, and propose and evaluate several techniques to improve endtoend performance. These include techniques to decrease the rate of acknowledgments on the constrained reverse channel (ack congestion control and ack filtering), techniques to reduce source burstiness when acknowledgments are infrequent (TCP sender adaptation), and algorithms at the reverse bottleneck router to schedule data and acks differently from FIFO (acksfirst scheduling).     

1 V All-MOS ΣΔ A/D Converters in the Log-domain

This paper presents novel low-voltage all-MOS analog circuit techniques for the synthesis of oversampling A/D converters. The new approach exploits the possibilities of Log-domain processing by using the MOSFET in subthreshold operation. Based on this strategy, a complete set of very low-voltage (down to 1 V) low-power (below 100 W) all-MOS basic building blocks is proposed. The resulting analog circuit techniques allow the integration of A/D converters for low-frequency (below 100 KHz) applications in digital CMOS technologies. Examples are given for a standard 0.35 m VLSI process.     

Network computing

Network computing represents a new computing paradigm in which all information, data and software applications reside on a network and are accessed on demand by users. This approach to computing offers the potential for users to access everything from anywhere, removing the constraints of localised storage of information and applications, and, based on evolving standards, allowing access from a range of information appliances. This paper introduces the basic ideas behind network computing, and examines a range of forms it could take. It describes the current status of commercial network computing approaches, with particular emphasis on the use of the Java language, and examines the associated benefits and technical issues. A prototype BT system, developed using Java client software and CORBA-based middleware, is described.     

The discrete Einstein relation

In this paper the connection between massM, resistance and commute time for random walks on graphs is further explored, and the relation=2M · is proved. An extension of the result is made to multigraphs, which are an extension of the graph concept where a black box is treated like an edge.     

SMART — improving customer service

The quality and consistency of customer service offered by telecommunications providers is now a key differentiator in the residential market-place. BT has introduced the SMART customer handling system to provide competitive advantage through worldclass levels of customer service. A large-scale, three-tier client/server system, SMART exploits the existing functionality, data and security mechanisms of an established mainframe system and adds ease-of-use, reduced error rates and a focus on service and selling. The development and deployment experiences of the SMART programme provide lessons in the delivery of large-scale distributed systems in a business-critical environment. The key issues of security, performance, resilience and operability are discussed and the solutions implemented for SMART are presented.     

Mobility Management for Hierarchical Wireless Networks

In this paper, we consider the mobility management in large, hierarchically organized multihop wireless networks. The examples of such networks range from battlefield networks, emergency disaster relief and law enforcement etc. We present a novel network addressing architecture to accommodate mobility using a Home Agent concept akin to mobile IP. We distinguish between the physical routing hierarchy (dictated by geographical relationships between nodes) and logical hierarchy of subnets in which the members move as a group (e.g., company, brigade, battalion in the battlefield). The performance of the mobility management scheme is investigated through simulation.