纳米压印制作半导体激光器的分布反馈光栅

分布反馈(DFB)光栅的制作是半导体激光器芯片的关键工艺,通过纳米压印技术在InP基片表面涂覆的光刻胶上压印出DFB光栅图形,并分别通过湿法腐蚀和干法刻蚀技术将光栅图形转移到InP基片上。所制作的DFB光栅周期为240nm(对应于1 550nm波长的DFB激光器),光栅中间具有λ/4相移结构。采用纳米压印技术制作的DFB光栅相对于通常双光束干涉法制作的光栅具有更好的均匀性以及更低的线条粗糙度,而且解决了双光束干涉法无法制作非均匀光栅的技术难题。相对于电子束直写光刻法,采用纳米压印技术制作DFB光栅具有快速与低成本的优势。采用纳米压印技术在InP基片上成功制作具有相移结构的DFB光栅,为进一步进行低成本高性能的半导体激光器芯片的制作奠定了良好基础。     

新型高抗粘紫外纳米压印光刻胶的工艺研究

为了减少紫外纳米压印技术脱模过程中的接触粘附力,开发了一种新型高流动、抗粘的紫外纳米压印光刻胶。光刻胶以BMA为聚合单体,添加特定配比的交联剂和光引发剂配置而成。紫外纳米压印实验在本课题组自主研发的IL-NP04型纳米压印机上完成。实验得到光刻胶掩膜膜厚为1.21μm,结构尺寸深246nm,周期937.5nm。实验结果表明,在没有对石英模板表面进行修饰的情况下,该光刻胶依然表现出高可靠性和高图形转移分辨率,有效减少了紫外纳米压印工艺中的模板抗粘修饰的工艺步骤。     

基于光刻版的无留膜紫外纳米压印技术研究

针对纳米压印光刻技术中压印脱模后的留膜去除问题,提出了一种基于光刻版的无留膜紫外纳米压印技术.采用传统的光刻版作为紫外压印模版,由于模版上铬层的遮蔽作用.使得铬层下面的光刻胶不被曝光,从而可以轻易地被去除.实验结果表明,该技术综合了压印与光刻各自的优点,可以获得无留膜厚度的压印图形,省去了压印后的留膜刻蚀工艺.从而避免了由于留膜厚度不均匀所带来的过刻蚀或欠刻蚀的问题.     

新型含硅丙烯酸酯型纳米压印胶的研究与应用

纳米压印技术因其成本低、产量高的优点广受关注,而开发可适用于纳米压印的压印胶成为该工艺的关键。合成了一种硅含量高的单体三(三甲基硅氧基)甲基丙烯酰氧丙基硅烷(TRIS),制备了一种新型紫外纳米压印用含硅丙烯酸酯型压印胶,用四点弯曲实验机和接触角测试仪表征了压印胶与模板的黏附性能,研究了配方组成对模板黏附性能的影响,优化得到了抗黏附性能优异的配方。压印实验结果表明,该压印胶与模板分离时无粘连。AFM与SEM测试结果表明,压印胶上复制得到了线宽149 nm、周期298 nm、深宽比为1的纳米光栅图形,图形结构完整。     

纳米压印光刻技术

为了避免纳米压印光刻技术与光刻技术混淆，纳米压印光刻技术严谨的专业术语定义是：不使用光线或者辐射使光刻胶感光成形，而是直接在硅衬底或者其他衬底上利用物理学机理构造纳米级别的图形。这种纳米成像技术真正地实现了纳米级别的图形印制。     

纳米压印技术进展及应用

半导体加工几十年里一直采用光学光刻技术实现图形转移,最先进的浸润式光学光刻在45 nm节点已经形成产能,然而,由于光学光刻技术固有的限制,已难以满足半导体产业继续沿着摩尔定律快速发展.在下一代图形转移技术中,电子束直写、X射线曝光和纳米压印技术占有重要地位.其中纳米压印技术具有产量高、成本低和工艺简单的优点,是纳米尺寸电子器件的重要制作技术.介绍了传统纳米压印技术以及纳米压印技术的新进展,如热塑纳米压印技术、紫外固化纳米压印技术、微接触纳米压印技术、气压辅助纳米压印技术、激光辅助压印技术、静电辅助纳米压印技术、超声辅助纳米压印技术和滚轴式纳米压印技术等.     

紫外纳米压印OLED衬底微结构的制备技术

在有机发光二极管(OLED)器件衬底上制备可传递三维立体微结构可有效消除波导、增加出光耦合,从而增加器件出光效率。纳米压印技术是制备立体微结构的主要方法之一。采用紫外纳米压印技术在OLED衬底上制备三维立体微结构。首先采用电子束光刻(EBL)技术与干法刻蚀相结合的方法来制备高精度的紫外纳米压印模板;然后对模板进行清洗与抗粘连处理;最后采用紫外纳米压印技术在OLED衬底上成功制备了可传递三维立体微结构。制备结果表明,所形成的微结构具有均匀性好和压印精度高的特点。     

纳米压印工艺中关键技术

纳米压印技术由于其分辨率高、工艺成本低以及适于大规模工业化生产的优点被广泛利用于纳米尺度的半导体器件的制作之中。然而,传统的硬模板压印技术存在着模板寿命短、大面积均匀性差以及易受颗粒影响的缺点。本文提出了一种高分子聚合物软模板（IPS）压印的方法来改进以上缺点,同时,本文提出在软模板制作和后续的紫外压印中采用变温变压阶梯升降压的方法来提高压印过程中胶的流动性,以提高压印图形的质量。最后,我们利用这种方法方法出了高质量的50纳米线宽的光栅图形。     

衍射干涉光刻研究

光刻就是将掩模版上的图形转移到基底的过程,广泛应用于微电子、微机械领域。衍射现象是光刻工艺无法避免的问题,当掩模图形尺寸接近光源波长时,就会产生衍射干涉现象。利用这一现象,可以产生小于掩模图形尺寸的图形。采用严格耦合波分析算法对光刻过程中的衍射干涉做了仿真分析;并用karl suss MA6光刻机实现了基于掩模的干涉光刻实验,通过增加滤光片得到相干光源,增强光刻过程的衍射,形成衍射干涉,掩模版透光区域和部分不透光区域下方的光刻胶得到曝光,利用微米尺度的光栅图形,在光刻胶上产生亚微米的光栅;最后利用干法刻蚀工艺,在硅基底上加工出亚微米尺度光栅。     

大规模集成电路制作中的光刻技术——紫外线曝光和电子束曝光

本文从实用于大规模集成电路制备的观点出发,对紫外线光刻和电子束光刻图形制作工艺中的问题进行了综述。在紫外线光刻方面,对接触曝光和投影曝光的对比、图形对准精度和正性胶图形的缺陷进行了讨论;对电子束曝光亦进行了讨论,这里包括扫描电子束曝光系统的稳定性、绘图精度、电子束光刻胶特性及其在有掩模制备和芯片直接曝光方面的应用等问题。     

Fast patterning and dry-etch of SiNχ for high resolution nanoimprint templates

We developed a simplified nanofabrication process for imprint templates by fast speed electron beam lithography (EBL) and a dry etch technique on a SiNx substrate, intended for large area manufacturing. To this end,the highly sensitive chemically amplified resist (CAR), NEB-22, with negative tone was used. The EBL process first defines the template pattern in NEB-22, which is then directly used as an etching mask in the subsequent reactive ion etching (RIE) on the SiNx to form the desired templates. The properties of both e-beam lithography and dry etch of NEB-22 were carefully studied, indicating significant advantages of this process with some drawbacks compared to when Cr was used as an etching mask. Nevertheless, our results open up a good opportunity to fabricate high resolution imprint templates with the prospect of wafer scale manufacturing.     

Capillary Force Lithography: Fabrication of Functional Polymer Templates as Versatile Tools for Nanolithography

The implementation of high‐resolution polymer templates fabricated by capillary force lithography (CFL) is explored both in nanoimprint lithography (NIL) and in the wet‐etching of metals. Several different thermoplastic and UV‐curable polymers and types of substrates are incorporated into the general CFL procedure to meet the diverging requirements of these two applications. The mechanical stability of UV‐curable templates for imprinting in polymers, as examined by atomic force microscopy (AFM), and their anti‐adhesive properties are excellent for application in NIL. The conditions for curing the UV‐curable polymer are optimized in order to obtain high‐stability polymer templates. Gold patterns on silicon with a lateral resolution of 150 nm are fabricated by subsequent lift‐off in acetone. Similar patterns with a lateral resolution of 100 nm are fabricated using templates of thermoplastic polymers on gold layers on silicon as an etch mask. The transfer of stamp residues during CFL with these polymer templates is proven by X‐ray photoelectron spectroscopy (XPS) and AFM friction analysis. For poly(methylmethacrylate) (PMMA), the presence of large amounts of silicon‐containing residues is found to compromise the processability of the resulting template in subsequent O₂ reactive‐ion etching (RIE) treatment. The extent of silicon contamination is up to six times less for polystyrene (PS). At this level, the etch performance of the PS etch mask is not affected, as was the case for PMMA. Accurate downscaling of the lateral dimensions of the resulting metal patterns by several factors with respect to the dimensions of the PS etch mask is achieved by over‐etching of the gold. Overall, the results in this paper demonstrate the potential of CFL templates as tools for high‐resolution soft lithography.     

Electron beam nanolithography in AZnLOF 2020

We present a lithography process using electron beam lithography with an optical resist AZnLOF 2020 for pattern transfer. High-resolution 100 keV electron beam lithography in 400 nm layers of negative resist AZnLOF 2020 diluted 10:4 with PMGEA is realized. After the electron beam lithography process, the resist is used as a mask for reactive ion etching. We performed the transfer of patterns by RIE etching of the substrate allowing a final resolution of 100 nm. We demonstrate the patterning in an insulating layer, thus simplifying the fabrication process of various multilayer devices; proximity correction has been applied to improve pattern quality and also to obtain lines width according to their spacing. This negative resist is removed by wet etching or dry etching, could allow combining pattern for smallest size down to 100 nm by EBL techniques and for larger sizes by traditional lithography using photomask.     

UV nanoimprint lithography process optimization for electron device manufacturing on nanosized scale

Imprint specific process parameters like the residual layer thickness and the etch resistance of the UV polymers for the substrate etch process have to be optimized to introduce UV nanoimprint lithography (UV NIL) as a high-resolution, low-cost patterning technique for research and industry into electron device manufacturing. Additionally, UV NIL processes have to be compatible with conventional silicon (Si) semiconductor processing. Within this work, the minimization of the residual layer thickness by using a multi-drop ink-jet system, which was integrated into the imprint stepper NPS300 from S-E-T-(formerly SUSS MicroTec), in combination with a low viscous UV polymer from Asahi Glass Company is shown. The etch resistance of different UV polymers against the poly-Si etch process was increased by 50% with an appropriate post-exposure bake. A poly-Si dry etch process was used to pattern the gates of short channel MOSFETs. After optimizing the poly-Si etch, properly working short channel MOSFETs with a minimum gate length of about 90 nm were fabricated demonstrating successfully the compatibility of UV NIL with conventional Si semiconductor processing on nanosized scale.     

GaInAs/InP quantum wires grown by metalorganic vapor phase epitaxy on V-grooved InP substrates

A single nominally lattice matched GaInAs quantum well (QW)/quantum wire (QWR) structure was grown by metalorganic vapor phase epitaxy (MOVPE) in V-grooved InP substrates. Different Si0₂ etch masks with opening widths from 2 μm down to 200 nm (for application as second order DFB grating) were defined by optical and electron beam lithography. A damage-reduced wet chemical etching process enables the growth of the GaInAs QWs/QWRs without any InP buffer layer. In low temperature photoluminescence we found improved intensity for all wire structures prepared by this etching technique. A reduction of the period and opening width of the V-groove etch mask resulted in a optimized luminescence intensity ratio between QW and QWR. Decay times from time resolved luminescence measurements were compared to the decay times of wet or dry etched mesa wires before and after regrowth. The good optical properties of the GaInAs QWRs are encouraging for future application as a QWR-laser device.     

富硅氧化硅微盘的制备研究

采用等离子体增强化学气相沉积(PECVD)及高温退火工艺制备了富硅氧化硅(SRSO)薄膜材料.喇曼光谱仪探测表明,该材料具有较高的光致发光(PL)效率,并在750 nm波长处达到发光峰值.采用电子束光刻(EBL)及电感耦合反应离子刻蚀(ICP)技术在Si衬底上制备了基于富硅氧化硅材料的光学微盘结构.为防止Si衬底的光吸收,在反应离子刻蚀(RIE)系统中研究出一种各向同性的刻蚀工艺,有效使微盘与Si衬底分离.扫描电镜(SEM)探测表明,该工艺具有良好的尺寸控制及高稳定性.利用该工艺,成功制备了直径为4μm的富硅氧化硅微盘器件.     

Nanoholes by soft UV nanoimprint lithography applied to study of membrane proteins

In this paper, we present an alternative technique to the well-known electron beam lithography in order to realize nanoholes in the silicon substrates for biological applications. The used technique is soft UV nanoimprint lithography (UV-NIL). We optimized the fabrication of silicon based supports obtained by soft UV-NIL and reactive ion etching to carry out very large arrays of nanoholes. The resolution limits are investigated when using poly(dimethylsiloxane) as flexible mold material. RIE conditions are initiated to limit the lateral mask resist etch.     

纳米压印光刻胶

光刻胶是纳米压印的关键材料,其性能将影响压印图形复制精度、图形缺陷率和图形向底材转移时刻蚀选择性。提出了成膜性能、硬度黏度、固化速度、界面性质和抗刻蚀能力等压印光刻胶的性能指标。并根据工艺特点和材料成分对光刻胶分类,介绍了热压印光刻胶、紫外压印光刻胶、步进压印式光刻胶和滚动压印式光刻胶的特点以及碳氧类纯有机材料、有机氟材料、有机硅材料做压印光刻胶的优缺点。列举了热压印、紫外压印、步进压印工艺中具有代表性的光刻胶实例,详细分析了其配方中各组分的比例和作用。介绍了可降解光刻胶的原理。展望了压印光刻胶的发展趋势。     

Fogging effect correction method in high-resolution electron beam lithography

We report on a fogging effect correction (FEC) method to be used in high-resolution e-beam lithography (EBL). In the new version of the previously presented PROX-In software tool, originally developed to determine the numerical proximity parameters for the proximity effect correction (PEC), was now implemented also the possibility of correcting large-range pattern distortion effects in connection with the modified PROXECCO^TM tool from PDF Solutions. This allows a complex exposure optimization by dose modulation of long-range fogging and/or loading effects with the standard PEC method using the same corrector. The presented approach is fast and effective, does not use any special additional technology steps and uses only standard high-resolution measuring techniques. The reviewed method was successfully implemented into mask production at different absorber stacks. It is also used for the determination of FEC input parameters and complex exposure optimization in e-beam direct write and step and flash imprint lithography (SFIL) template manufacturing with sub-50 nm resolution capability.