共查询到18条相似文献,搜索用时 312 毫秒
1.
从国内情况看,高级综合系统的目标,即后端CAD版图工具可分为两大类,一类只能接收门级网表;而另一类其单元库较为完备,往往能接收较大颗粒度的宏单元。针对这种情况,本文研究高级综合结果与后端工艺的衔接问题。提出多目标多层次工艺映射(MLTMMT)策略。旨在与多种工艺衔接,解决实现该策略的有关问题。(1)给出多目标工艺映射方法的形式化描述;(2)给出在多个层次上的多目标工艺映射方法;(3)分析研究多种库 相似文献
2.
3.
4.
给出了寄存器传输级工艺映射(RTLM)算法,该方法支持使用高层次综合和设计再利用的现代VLSI设计方法学,允许复杂的RT级组件,尤其是算术逻辑单元(ALU)在设计中重用.首先提出了ALU的工艺映射问题,给出了源组件和目标组件以及标准组件的定义,在此基础上通过表格的方式给出映射规则的描述.映射算法套用一定的映射规则用目标ALU组件来实现源ALU组件.采用一种基于分支估界法的图聚集算法,用该算法不仅可以产生面积最优的,而且还可以产生延时最优的设计.针对不同库的实验结果证明该算法对于规则结构的数据通路特别有效. 相似文献
5.
基于图聚集算法的寄存器传输级ALU工艺映射算法 总被引:1,自引:1,他引:0
给出了寄存器传输级工艺映射(RTLM)算法,该方法支持使用高层次综合和设计再利用的现代VLSI设计方法学,允许复杂的RT级组件,尤其是算术逻辑单元(ALU)在设计中重用.首先提出了ALU的工艺映射问题,给出了源组件和目标组件以及标准组件的定义,在此基础上通过表格的方式给出映射规则的描述.映射算法套用一定的映射规则用目标ALU组件来实现源ALU组件.采用一种基于分支估界法的图聚集算法,用该算法不仅可以产生面积最优的,而且还可以产生延时最优的设计.针对不同库的实验结果证明该算法对于规则结构的数据通路特别有效. 相似文献
6.
RAM(Random-Access-Memory,随机存储器)是FPGA(Field Programmable Gate Arrays)片上最重要的宏单元之一,RTL(Register-Transfer-Level)综合对FPGA开发中RAM的有效利用起至关重要作用.本文针对RTL综合中RAM源描述和目标结构多样化带来的技术难题,提出了一种RAM工艺映射方法,即建立工艺无关的RAM统一模型,在模型基础上通过建模、模式匹配、造价计算、绑定四步实现.该方法应用于RTL综合,可以将多种RAM源描述有效地映射到最佳类型和数量的FPGA片上RAM资源.实验数据表明采用该方法实现的RAM工艺映射效果和主流FPGA综合工具--Synplify和XST相当,该模块已经集成在自主开发的RTL综合工具--Hqsyn中并实现商用. 相似文献
7.
本文以电容线性延时模型为基础,通过分析逻辑电路在综合及布图阶段的延时计算方式,提出了一种在工艺映射与布局合算法中动态估计电路延时的方法,并给出实验结果。 相似文献
8.
9.
10.
提出了一种寄存器传输级存储器工艺映射(RTLM)算法,该方法用目标存储模块来综合一个源存储器,它支持使用高层次综合和设计再利用的现代VLSI设计方法学。存储器的映射被定义为三个子问题,即端口映射、字长映射和字数映射。最后,把这三个子问题综合起来形成完整的算法。实验结果表明,RTLM在高层次综合中对存储器设计的再利用是一种有效的方法。 相似文献
11.
In this paper, a half bridge convert driver IC with novel common mode rejection technique is designed and implemented in 1.0 μm high voltage (650 V) Dielectric Isolation MOS (DIMOS) process. The Designed IC is suitable for medium power (under 500 W) applications such as consumer electronics. Half bridge converter driver IC with a novel common mode rejection technique, which is composed of noise filter and set inhibitor, shows high dv/dt noise immunity up to 66.67 V/ns. Spectre simulation was performed to verify the electrical characteristics of the designed IC. 相似文献
12.
随着集成电路工艺技术的发展,连线延时将逐渐主导系统的性能,传统的高层次综合方法已经不能满足设计的需要。文章讨论了寄存器传输级结构对综合方法的影响,并提出使用分模块的寄存器传输级结构作为高层次综合的目标结构。针对新的结构,概括了设计流程,设计了核心算法。实验数据表明,与传统的方法相比,该方法可以有效地改善系统的性能。 相似文献
13.
Ma Cong Wang Zuojian Liu Mingye 《电子科学学刊(英文版)》2001,18(1):24-31
This paper studies the linkage problem between the result of high-level synthesis and back-end technology, presents a method of high-level technology mapping based on knowledge, and studies deeply all of its important links such as knowledge representation, knowledge utility and knowledge acquisition. It includes: (1) present a kind of expanded production about knowledge of circuit structure; (2) present a VHDL-based method to acquire knowledge of technology mapping; (3) provide solution control strategy and algorithm of knowledge utility; (4) present a half-automatic maintenance method, which can find redundance and contradiction of knowledge base; (5) present a practical method to embed the algorithm into knowledge system to decrease complexity of knowledge base. A system has been developed and linked with three kinds of technologies, so verified the work of this paper. 相似文献
14.
15.
Integrated circuit (IC) reliability is gaining increasing concerns in IC technology with decreasing device size, and the impact of interconnect failure mechanisms on IC failure rate increases significantly with decreasing interconnect dimension and increasing number of interconnect levels. In this work, we attempt a first step in the study of interconnect electromigration reliability in integrated circuit using a complete 3D circuit model. 3D circuit model is necessary because all integrated circuits are 3D in their actual physical implementation, and 3D model is essential for the study of today interconnect reliability. As temperature and stress distributions in the interconnect are crucial to its reliability, we demonstrate our method through the computation of their distributions in a simple inverter circuit under typical normal operating condition, and the locations of the electromigration weak spots in the interconnect system are identified. 相似文献
16.
高压RESURF LDMOSFET的实现 总被引:6,自引:0,他引:6
利用RESURF技术,使用常规低压集成电路工艺,实现了适用于HVIC、耐压达1000V的LDMOSFET。本文介绍了该高压LEMOSFET的设计方法、器件结构、制造工艺测试结果,此外,本文还从实验和分析的角度探讨了覆盖在漂移区上面的金属栅-金属栅场板长度LF对RESURF器件耐压的影响。 相似文献
17.