光伏发电用推挽正激升压电源的研究

针对光伏发电升压电源中存在的输入输出不隔离及体积大效率低的缺点,研制了一款具有MPPT功能的新型推挽正激升压电源。以推挽正激变换器作为升压电源的核心,设计了升压电源主电路、控制电路、反馈电路。在最大功率点跟踪中提出了扰动因子,利用改进的变步长扰动观察法对传统的MPPT算法进行优化。实验结果显示了变换器良好的特性,推挽正激升压电源达到了结构简单稳定性高的设计要求并能准确迅速跟踪外部环境的变化。     

A CMOS micro power switched-capacitor DC–DC step-up converter for indoor light energy harvesting applications

This paper presents a micro power light energy harvesting system for indoor environments. Light energy is collected by amorphous silicon photovoltaic (a-Si:H PV) cells, processed by a switched capacitor (SC) voltage doubler circuit with maximum power point tracking (MPPT), and finally stored in a large capacitor. The MPPT fractional open circuit voltage (V_OC) technique is implemented by an asynchronous state machine (ASM) that creates and dynamically adjusts the clock frequency of the step-up SC circuit, matching the input impedance of the SC circuit to the maximum power point condition of the PV cells. The ASM has a separate local power supply to make it robust against load variations. In order to reduce the area occupied by the SC circuit, while maintaining an acceptable efficiency value, the SC circuit uses MOSFET capacitors with a charge sharing scheme for the bottom plate parasitic capacitors. The circuit occupies an area of 0.31 mm² in a 130 nm CMOS technology. The system was designed in order to work under realistic indoor light intensities. Experimental results show that the proposed system, using PV cells with an area of 14 cm², is capable of starting-up from a 0 V condition, with an irradiance of only 0.32 W/m². After starting-up, the system requires an irradiance of only 0.18 W/m² (18 μW/cm²) to remain operating. The ASM circuit can operate correctly using a local power supply voltage of 453 mV, dissipating only 0.085 μW. These values are, to the best of the authors’ knowledge, the lowest reported in the literature. The maximum efficiency of the SC converter is 70.3 % for an input power of 48 μW, which is comparable with reported values from circuits operating at similar power levels.     

A Digital Coreless Maximum Power Point Tracking Circuit for Thermoelectric Generators

This paper describes a maximum power point tracking (MPPT) circuit for thermoelectric generators (TEG) without a digital controller unit. The proposed method uses an analog tracking circuit that samples the half point of the open-circuit voltage without a digital signal processor (DSP) or microcontroller unit for calculating the peak power point using iterative methods. The simulation results revealed that the MPPT circuit, which employs a boost-cascaded-with-buck converter, handled rapid variation of temperature and abrupt changes of load current; this method enables stable operation with high power transfer efficiency. The proposed MPPT technique is a useful analog MPPT solution for thermoelectric generators.     

A Maximum Power Point Tracking System With Parallel Connection for PV Stand-Alone Applications

This paper presents the analysis, design, and implementation of a parallel connected maximum power point tracking (MPPT) system for stand-alone photovoltaic power generation. The parallel connection of the MPPT system reduces the negative influence of power converter losses in the overall efficiency because only a part of the generated power is processed by the MPPT system. Furthermore, all control algorithms used in the classical series-connected MPPT can be applied to the parallel system. A simple bidirectional dc-dc power converter is proposed for the MPPT implementation and presents the functions of battery charger and step-up converter. The operation characteristics of the proposed circuit are analyzed with the implementation of a prototype in a practical application.     

ZVS Buck-Boost LLC cascade converter with all soft switched switches

A Buck-Boost LLC cascade converter is proposed in this paper. In virtue of the Zero-Voltage-Switching (ZVS) modulation strategy for Buck-Boost circuit, all the switches can be soft switched with wide conversion range and full load range. By sharing one of the two bridge legs, the magnetizing current needed to realize the ZVS of switches decreases. Then, the power density and efficiency of the proposed converter increase. Theoretical analysis and characteristics of the proposed converter are presented and verified on a 210 V–400 V input 12 V/400 W output experimental prototype. The experimental results show that the proposed converter can achieve a peak efficiency of 95.6% at 1 MHz. The power density of the proposed converter is as high as 414 W/in³ with the help of GaN transistors and planar transformers.     

Maximum Power Point Tracking Controller for Thermoelectric Generators with Peak Gain Control of Boost DC–DC Converters

An analog maximum power point tracking (MPPT) circuit for a thermoelectric generator (TEG) is proposed. We show that the peak point of the voltage conversion gain of a boost DC?CDC converter with an input voltage source having an internal resistor is the maximum power point of the TEG. The key characteristic of the proposed MPPT controller is that the duty ratio of the input clock pulse to the boost DC?CDC converter shifts toward the maximum power point of the TEG by seeking the peak gain point of the boost DC?CDC converters. The proposed MPPT technique provides a simple and useful analog MPPT solution, without employing digital microcontroller units.     

High efficiency boost converter with variable output voltage using a self-reference comparator

This paper presents a boost converter with variable output voltage and a new maximum power point tracking (MPPT) scheme for biomedical applications. The variable output voltage feature facilitates its usage in a wide range of applications. This is achieved by means of a new low-power self-reference comparator. A new modified MPPT scheme is proposed which improves the efficiency by 10%. Also, to further increase the efficiency, a level converter circuit is used to lower the V_dd of the digital section. The low input voltage requirements allow operation from a thermoelectric generator powered by body heat. Using this approach, a thermoelectric energy harvesting circuit has been designed in a 180 nm CMOS technology. According to HSPICE Simulation results, the circuit operates from input voltages as low as 40 mV and generates output voltages ranging from 1 to 3 V. A maximum power of 138 μW can be obtained from the output of the boost converter which means that the maximum end-to-end efficiency is 52%.     

A 95 nA quiescent current hysteretic mode buck converter with sample and hold reference

A nano ampere (nA) hysteretic mode buck converter is presented in this paper. Nano ampere current sleep phase and fast response burst phase are implemented. The converter achieves nano-watt power consumption in sleep phase while ensures fast wake-up from sleep phase to burst phase. New developed ultra low power sample-hold voltage reference and 1 kHz oscillator draw currents of 20 and 10 nA respectively. The circuit was implemented in a 0.35 μm CMOS process. The measurement result shows that the converter’s quiescent current (Iq) in sleep phase is as low as 95 nA. Benefit from the ultra-low Iq, the circuit achieves conversion efficiency of 79.8% at 2 μA load, regulating output at 2.5 V with a 3.6 V supply. The peak efficiency is up to 94% at 50 mA load.     

Low-power analogue computational blocks based on high-performance floating-gate MOSFET resistor

This article proposes a new FGMOS-based programmable FGMOS resistor. A highly linear resistor is implemented by cancelling the non-term present in the drain current equation of MOSFET operating in the linear region. The inherited features of FGMOS resistor are simplicity, programmability, wider bandwidth and very low power dissipation without supply voltage. The power dissipation of the proposed FGMOS resistor is only 985 nW. Analogue computational blocks such as programmable reciprocal circuit, current to voltage converter and low-pass filter as applications of proposed programmable FGMOS resistor are also suggested. The power dissipation of reciprocal circuit and low-pass filter are 14.7 and 131 µW, respectively. To demonstrate the efficacy of the circuits, simulations are carried out using SPICE on 0.13 µm CMOS technology.     

An ultra-low power CMOS DC–DC buck converter with double-chain digital PWM technique

In present-day integrated digital circuits are become attractive choice for the DC–DC buck converters. This paper proposes a novel approach of CMOS DC–DC buck converter with double-chain digital pulse width modulation (PWM) for ultra-low power applications. The proposed digital PWM architecture consists of double delay lines which is to reduce power consumption and improves ripple voltage with the resolution. An algorithm is proposed that describes the operation of digital PWM. The double chain digital PWM is implemented and analyzed in cadence platform using commercial 180 nm TSMC design kit. The promising results reveals that the power consumption is reduces up to 1.16 µW with occupies less area under the operating frequency of 100 kHz. The DC–DC buck converter with proposed PWM achieves peak efficiency of 92.6% including a load current range of 4–10 mA. This proposed digital PWM method demonstrates its ability to minimize the ripple voltage by 49% and enables to DC–DC converter for compose in a compact chip area as compared to conventional converters. Measured and Simulated power efficiency are made good agreement with each other.     

Integrated current-mode DC–DC boost converter with high-performance control circuit

In this paper, integrated BiCMOS amplifier and current-sensing circuits are introduced for high-performance DC–DC boost converter. By exploiting the advantage of BiCMOS technology, the high gain amplifier and accurately sensed inductor current are obtained in the feedback control circuit. The proposed current-sensing circuit adopts a current-mirror instead of op-amplifier as a voltage follower so that it would reduce power consumption with a smaller chip-size. Bipolar transistor is also applied in the differential pair and current sources of the error amplifier to obtain a fast transient response. Frequency response shows the amplifier gain with the compensator affects significantly on the stability of the converter. The chip is fabricated in 0.35 µm 2-poly 4-metal BiCMOS process. The measurement shows that the current-sensing circuit can operate with accuracy of higher than 90 % at the frequency from 10 to 200 kHz and the transient time of the error amplifier is controlled within 10 µs. The converter with chip-size of 1 mm² operates at the output voltage of 4.5–9 V with the frequency of 0.01–1 MHz.     

A bipolar output voltage pulse transformer boost converter with charge pump assisted shunt regulator for thermoelectric energy harvesting

This system presents an energy harvesting system that generates bipolar output voltage (±1 V) based on a miniature 1:1 turn-ratio pulse transformer boost converter using sub-threshold level input voltage source. A shunt regulator is designed using six-transistor Schmitt-Trigger core to limit the boost converter output voltage. Another power stage, i.e. a fully integrated on-chip single-stage cross-coupled charge pump, then generates 3 V output from the unused extra output power of boost converter, which is shunted otherwise. The increased voltage headroom generated is instrumental for sensor, analog and RF circuits. Charge pump clock frequency is designed to adaptively tracking the input voltage, which is sensed using power-saving time-domain digital technique. Based on a standard CMOS 0.13-µm technology, chip measurement verified the operations of the boost converter, shunt regulator and bipolar charge pump prototypes, respectively. Simulations confirmed the full system operations. During start-up, the system only requires minimum start-up input voltage of 36 mV at input power of 5.8 µW.     

Analysis and Experiment of Self-Powered,Pulse-Based Energy Harvester Using 400 V FEP-Based Segmented Triboelectric Nanogenerators and 98.2% Tracking Efficient Power Management IC for Multi-Functional IoT Applications

A self-powered system for the Internet of Things (IoT) is demonstrated for efficient energy harvesting of naturally available mechanical energy. In this system, new contact-separation mode triboelectric nanogenerators (TENGs), based on fluorinated ethylene propylene, are investigated using the segmented multi-TENG configuration to reduce the effect of parasitic capacitance. The TENG extraction is optimized using a unit step excitation involved with the Dawson function to achieve a high voltage (400 V) and a high current (26.6 µA). To fully extract the power of the TENGs, the power management integrated circuit (PMIC) specially designed for adaptively controlled, high-voltage (HV) maximum power point tracking (MPPT) is proposed. The PMIC implemented in a bipolar CMOS-DMOS 180 nm process can handle a wide input range (5–70 V) by consuming 420 nW. The MPPT control allows a wide range of impedance matching from 10 to 300 MΩ, achieving a tracking efficiency of up to 98.2%. The end-to-end efficiency of 88% demonstrates state-of-the-art performance. To supply a higher instantaneous power than that available from the TENGs, a duty-cycling technique is successfully demonstrated. The proposed energy harvesting system provides a promising approach to realizing sustainable and autonomous energy sources for various IoT applications.     

Transformer‐Reuse Reconfigurable Synchronous Boost Converter with 20 mV MPPT‐Input, 88% Efficiency,and 37 mW Maximum Output Power

This paper presents a transformer‐based reconfigurable synchronous boost converter. The lowest maximum power point tracking (MPPT)‐input voltage and peak efficiency of the proposed boost converter, 20 mV and 88%, respectively, were achieved using a reconfigurable synchronous structure, static power loss minimization design, and efficiency boost mode change (EBMC) method. The proposed reconfigurable synchronous structure for high efficiency enables both a transformer‐based self‐startup mode (TSM) and an inductor‐based MPPT mode (IMM) with a power PMOS switch instead of a diode. In addition, a static power loss minimization design, which was developed to reduce the leakage current of the native switch and quiescent current of the control blocks, enables a low input operation voltage. Furthermore, the proposed EBMC method is able to change the TSM into IMM with no additional time or energy loss. A prototype chip was implemented using a 0.18‐μm CMOS process, and operates within an input voltage range of 9 mV to 1 V, and an output voltage range of 1 V to 3.3 V, and provides a maximum output power of 37 mW.     

Multiinput converter with power factor correction, maximum power point tracking, and ripple-free input currents

A multiinput converter for photovoltaic (PV) power system applications with power factor correction (PFC), maximum power point tracking (MPPT), and ripple-free input currents (RFIC) is proposed in this paper. With phase-shifted pulse-width-modulation (PWM) control, the multiinput converter can draw power from the utility line and PV arrays individually or simultaneously and deliver it to the load. In addition, an almost unity power factor for the utility line and an MPPT for PV arrays can also be achieved. Moreover, the upper power switches of each input-stage circuit in the proposed converter are operated with zero-current-switching (ZCS) at turn-off transition and the lower ones are operated with zero-voltage-switching (ZVS) at turn-on transition. Hence, the switching losses of the power switches can be reduced. Experimental measurements are demonstrated to verify the performance of the proposed multiinput converter.     

A 1 Gsps and 840 µW fully dynamic asynchronous pipelined binary search ADC

In this paper a very low power asynchronous 5-bit ADC in CMOS 45 nm process technology is described which combines the pipeline and binary search architectures. Due to utilization of dynamic non-linear amplifier, power consumption of the converter is very low. The ADC circuit uses digital calibration technique to update the reference voltages of the comparators. The power consumption of ADC is 840 µW, and the ENOB is 4.05 at 1 Gsps with input signal at the Nyquist rate. At sampling rate of 10 0Msps, the power consumption is reduced to 89 µW and the ENOB is equal to 4.6 again at the Nyquist rate.     

Development of 100-W High-Efficiency MPPT Power Conditioner and Evaluation of TEG System with Battery Load

This paper describes a practical high-efficiency thermoelectric (TE) power conditioner with maximum power point tracking (MPPT) control for thermoelectric generators and the operation results for a battery load system. This power conditioner comprises a high-frequency step-up/step-down switching converter and a microcontroller; a synchronized switching circuit is introduced to achieve high conversion efficiency. Furthermore, it is equipped with a battery charge control program and has a maximum conversion efficiency of 96.7%. An impedance matching method developed for MPPT control showed excellent response against a change in the TEG output, making it suitable for solar TEGs as well as general applications.     

CMOS integrated MPP tracker with analog power measurement at the PV converter input

An integrated converter controller with maximum power point (MPP) regulation in 0.35 μm CMOS for photovoltaic (PV) applications is reported. The implemented MPP tracker bases on a perturb and observe algorithm and acquires the information concerning the power flow via an analog processing circuit which is connected at the switched mode converter input respectively the output of the attached PV string of nine cells. There the solar cell current is measured via a very low-ohmic shunt resistor of 1 mΩ and analogously multiplied with the cell voltage. As output the fabricated test chip directly generates a 530 kHz PWM signal for the external switched mode converter. Measurements show that under similar conditions analog MPP tracking of the converter input power improves the robustness with respect to settling times of the power path compared to those topologies at which the power is measured at the converter output. Between 0.4 and 7.5 A photocurrent the chip achieves tracking efficiencies better than 99.5 % while the power consumption is only 750 μW and a very low chip area demand of 0.043 mm² for the MPP tracking core is achieved.     

A 200-mA, 93% peak power efficiency, single-inductor, dual-output DC–DC buck converter

A single-inductor dual-output (SIDO) DC–DC buck converter is presented. The circuit uses only one (external) inductor to provide two independent output voltages ranging from 1.2 V to the power supply (2.6–5 V) with a maximum total output current of 200 mA. The proposed converter has been fabricated in a 0.35-μm p-substrate CMOS technology. Measurement results demonstrate that a peak power efficiency as high as 93.3% can be achieved. An automatic substrate bias switch technique, that cancels the body effect of the p-channel output power transistors, improves the converter power efficiency performance.     

A novel time-based low-power pipeline analog to digital converter

A new power reduction technique for analog-to-digital converters is proposed in this paper. A novel current-mode algorithm which uses time to perform analog-to-digital conversion has been described and a 12 bit 100-ksample/s time-based pipeline analog to digital converter has been designed and simulated in standard 90-nm CMOS technology based on introduced structure. Employed circuit techniques include a continues-time comparator, bottom plate sampling, digital correction and a state machine. A time based-mechanism has been used for subtraction and amplification. Simulation results show that the pipelined ADC achieves a peak signal-to-noise-and-distortion ratio of 69.8 dB, a peak spurious-free dynamic range of 75 dB, a total harmonic distortion of 73 dB, and a peak integral nonlinearity of 0.85 least significant bits. The total power dissipation is 90 μW from a 3-V supply.