铜化学机械抛光中的平坦性问题研究

铜的化学机械抛光(Cu-CMP)技术是ULSI多层金属布线结构制备中不可缺少的平坦化工艺.Cu-CMP后硅片表面的蝶形、侵蚀等平坦性缺陷将降低铜线的最终厚度和增大电阻率,从而降低器件性能和可靠性.而且可能进一步影响硅片的面内非均匀性(WIWUN),在多层布线中导致图案转移的不准确.本文介绍了对Cu-CMP平坦性的仿真、模拟和实验研究,并着重分析了碟形、侵蚀和WlWUN与抛光液、线宽和图案密度、抛光速度和载荷等相关参数的关系.     

CMP抛光运动机理研究

通过对硅晶片化学机械抛光过程中抛光运动机理的理论分析,研究了硅晶片的抛光运动特性,探讨了主要工艺参数对硅晶片化学机械抛光后晶片表面粗糙度和表面平整度、抛光均匀性的影响规律。     

新型铜互连方法——电化学机械抛光技术研究进展

多孔低介电常数的介质引入硅半导体器件给传统的化学机械抛光(CMP)技术带来了巨大的挑战,低k介质的脆弱性难以承受传统CMP技术所施加的机械力.一种结合了电化学和机械平坦化技术的新颖铜平坦化工艺--电化学机械抛光(ECMP)应运而生,ECMP在很低的压力下实现了对铜的平坦化,解决了多孔低介电常数介质的平坦化问题,被誉为未来半导体平坦化技术的发展趋势之一.主要综述了电化学机械抛光技术的产生、原理、研究进展和展望,对铜的ECMP技术进行了回顾和讨论.     

W-Mo合金表面超精密加工的CMP技术研究

阐述了金属化学机械抛光的机理。将半导体制造工艺中的nm级平坦化技术、化学机械抛光技术拓展并应用到W-Mo合金工艺中,在实现精密物理材料表面高平坦度、低粗糙度的前提下,提高W-Mo合金去除速率。采用碱性抛光液进行实验,确定了抛光液的成分;分析了W-Mo合金化学机械抛光中压力、流量、转速、pH值、活性剂等参数对W-Mo合金的影响。实验表明,实现W-Mo合金表面超精密抛光的最佳条件为:压力0.06MPa,流速160mL/min,转速60r/min,pH值10.1~10.3。     

稀释倍数对弱碱性铜粗抛液性能的影响

研究了三种不同稀释倍数的弱碱性铜粗抛液,原液采用商用FA/O型铜抛光液,稀释倍数分别为1倍、3倍和5倍。基于化学机械抛光(CMP)作用机理,在相同工艺条件下分析了三种粗抛液对铜膜的平均去除速率、片内非均匀性(WIWNU)和平坦化性能等指标的影响。铜膜的抛光实验结果表明:稀释3倍的弱碱性铜粗抛液对铜膜平均去除速率高达869.76 nm/min,片内非均匀性仅为2.32%。四层图形片的平坦化测试结果显示,图形片初始高低差为312.5 nm,采用稀释3倍的粗抛液抛光20 s后,有效消除高低差261.5 nm,基本实现了全局平坦化,满足45 nm技术节点的要求。     

铜抛光液对片内非均匀性影响的研究

对于低介电常数材料和铜互连结构在低压化学机械抛光中,研发新的抛光液和调整工艺参数是非常必要的。抛光液的研发是减少抛光表面划伤和解决磨料剩余的关键。抛光液组成由片内非均匀性和铜抛光去除速率特性来优化。氧化剂浓度1Vol%;磨料浓度0.8Vol%;螯合剂浓度2Vol%。工作压力1kPa。抛光后表面缺陷减小并且表面干净无污染。去除速率289nm/min,片内非均匀性0.065。化学机械抛光后用原子力测量粗糙度为0.22 nm。     

ULSI化学机械抛光的研究与展望

随着半导体行业的飞速发展，集成电路特征尺寸的微细化，半导体薄膜表面的高平坦化对器件高性能、低成本、高成品率有着重要的影响。作为唯一能实现全局平坦化方法的化学机械抛光(CMP)，近年来发展迅速，应用广泛。文章综述了化学机械抛光技术的发展现状：包括化学机械抛光设备、抛光液、抛光机理模型及应用研究进展；在此基础上，对CMP下一步发展的方向及其应用前景进行了展望。     

CMP系统中抛光头与抛光台运动关系分析

目前半导体制造技术已经进入0.13μm、300mm时代,随着硅片尺寸的增大以及特征线宽的减小,作为目前硅片超精密平坦化加工的主要手段-化学机械平坦化,已经成为IC制造技术中不可缺少的技术。介绍了在化学机械抛光过程中,可以通过抛光头与抛光台运动速度关系优化配置,降低晶片表面不均匀度,从而更好地实现晶片局部和全局平坦化。     

ULSI关键工艺技术——纳米级化学机械抛光

IC器件尺寸的纳米化,要求高的光刻曝光分辨率,在采用短波长和大数值孔径曝光系统提高分辨率的同时导致了焦深变浅,进而对晶片表面的平坦化要求越来越高。在比较了IC工艺中的四种平坦化技术基础上,重点综述了唯一可以实现全局平坦化的化学机械抛光(CMP)方法的发展、应用及展望。     

CMP在集成电路非金属材料平坦化中的应用（Ⅰ）

化学机械抛光（CMP）工艺由IBM于1984年引入集成电路制造工业，并首先用在后道工艺的金属间绝缘介质（IMD）的平坦化，然后通过设备和工艺的改进用于钨（W）的平坦化，随后用于浅沟槽隔离（STI）和铜（Cu）的平坦化。化学机械抛光（CMP）为近年来IC制程中成长最快、最受重视的一项技术。其主要原因是由于超大规模集成电路随着线宽不断细小化而产生对平坦化的强烈需求。本文重点介绍CMP在集成电路中的非金属材料的平坦化应用。     

Dummy fill effect on CMP planarity

With the use of a chemical-mechanical polishing(CMP)simulator verified by testing data from a foundry,the effect of dummy fill characteristics,such as fill size,fill density and fill shape,on CMP planarity is analyzed.The results indicate that dummy density has a significant impact on oxide erosion,and copper dishing is in proportion to dummy size.We also demonstrate that cross shape dummy fill can have the best dishing performance at the same density.     

一种能提高DRC友好性和CMP形貌的冗余金属填充方法

化学机械研磨(CMP)被广泛用于铜镶嵌工艺,研磨后铜的厚度和表面形貌对65纳米以下的工艺显得越来越重要,厚度和形貌的变动会对芯片良率和性能造成恶劣影响,所以必须在设计时就进行慎重的考虑。众所周知,插入冗余金属是提升CMP形貌的一个好方法,通常基于规则的方法广泛用于65纳米及以上工艺中,但是该技术在比较先进制程中显示不出其优越性。本文阐述了一种基于模型的冗余金属填充方法,它是根据设计版图中的周围环境用计算机算法来填充。这一方法的优点有以下几方面:在设计规则检查(DRC)中更少的违规数量,更密集的图形密度分布和更少的填充图案数量,更小的密度和周长梯度。在使用40纳米工艺的晶圆上,基于模型方法得到的表面平坦度与基于规则的填充方法相当,但是比公开的其它填充方法要好。     

A dishing model for STI CMP process

It is well known that field-oxide dishing occurring in STI CMP leads to considerable sidewall and edge-parasitic conduction as well as high electric fields in the gate oxide at the active-area edge. Thus, a closed-form solution for quantitative prediction of oxide dishing is needed. A contact-mechanics-based approach to describe the steady-state oxide dishing occurring in STI CMP process is presented. The theory is validated through comparison with experimental data in the literature. Once validated, the model is used to quantify the effect of pattern geometry on oxide dishing. Oxide dishing is found to be strongly dependent on field-oxide width and reach the maximum value at a certain pattern density.     

An analytical dishing and step height reduction model for chemical mechanical planarization (CMP)

An analytical model for dishing and step height reduction in chemical mechanical planarization (CMP) is presented. The model is based on the assumption that at the feature scale, high areas on the wafer experience higher pressure than low areas. A Prestonian material removal model is assumed. The model delineates how dishing and step height reduction depend on slurry properties (selectivity and Preston's constants), pad characteristics (stiffness and bending ability), polishing conditions (pressure, relative velocity and overpolishing) and wafer surface geometry (linewidth, pitch and pattern density). Model predictions are in good agreement with existing experimental observations. The present model facilitates understanding of the CMP process at the feature scale. Based on the proposed model, design avenues for decreasing dishing and increasing the speed of step height reduction may be explored through modification of appropriate parameters for slurry, pad and polishing conditions. The proposed model may also be used as a design tool for pattern layout to optimize the performance of the CMP process.     

铜化学机械抛光工艺中碟形缺陷的优化

铜化学机械抛光是近些年发展最快的一种工艺,铜碟形是铜化学机械抛光工艺中的主要问题之一。严重的碟形缺陷会造成产品良率的缺失,使得利润下降。碟形是由于在抛光过程中铜线与介质层不同的抛光速率所导致。文章详细地介绍了铜化学机械抛光的基本步骤和不同作用,然后指出了在抛光过程中碟形产生的基本原理,最后对抛光过程中最重要的抛光液及其成份对碟形的影响进行了分析。通过试验各种成分的剂量组成不同配方的抛光液,最终给出了减少碟形的具体改进方案。     

Dishing-radius model of copper CMP dishing effects

Copper chemical-mechanical polishing (CMP) dishing concerns semiconductor manufacturing yield in contemporary back-end-of-the-line process. In this work, we first propose and validate a dishing model through first-principle analysis and carefully designed experimentation. This model utilizes the novel concept of dishing radius, a metric that assumes cylindrically shaped post-CMP copper surface and directly captures the extent of metal dishing for a CMP process. Additionally, a dishing-model-based method for extracting the parameterized two-dimensional post-CMP metal profile is developed for damascene structures. The case study utilizing this method shows that the extracted parameters are in good agreement with those from cross-sectional scanning electron microscopy and surface profilers, which confirmed that dishing radius is linewidth-independent for typical metal lines. This method is particularly useful in determining dishing artifacts, which are modeled using the dishing radius concept. The approach is nondestructive, precise, and efficient.     

版图图形特征对铜化学研磨的影响

Copper chemical mechanical polishing （CMP） is influenced by geometric characteristics such as line width and pattern density, as well as by the more obvious parameters such as slurry chemistry, pad type, polishing pressure and rotational speed. Variations in the copper thickness across each die and across the wafer can impact the circuit performance and reduce the yield. In this paper, we propose a modeling method to simulate the polishing behavior as a function of layout pattern factors. Under the same process conditions, the pattern density, the line width and the line spacing have a strong influence on copper dishing, dielectric erosion and topography. The test results showed： the wider the copper line or the spacing, the higher the copper dishing; the higher the density, the higher the dielectric erosion; the dishing and erosion increase slowly as a function of increasing density and go into saturation when the density is more than 0.7.     

Effects of pattern characteristics on copper CMP

Copper chemical mechanical polishing(CMP)is influenced by geometric characteristics such as line width and pattern density,as well as by the more obvious parameters such as slurry chemistry,pad type,polishing pressure and rotational speed.Variadons in the copper thickness across each die and across the wafer Can impact the circuit performance and reduce the yield.In this paper,we propose a modeling method to simulate the polishing behavior as a function of layout pattern factors.Under the same process conditions,the pattern density,the line width and the line spacing have a strong influence on copper dishing,dielectric erosion and topography.The test results showed:the wider the copper line or the spacing,the higher the copper dishing;the higher the density,the higher the dielectric erosion;the dishing and erosion increase slowly as a function of increasing density and go into saturation when the density is more than 0.7.     

嵌入式闪存中浮栅多晶硅CMP制程的研究与改善

随着CMP技术的日益发展和闪存特征尺寸的越来越小以及对多晶硅表面形态及前后层次间套准要求的提高,这一技术也被用于嵌入式闪存产品中浮动栅多晶硅的平坦化。浮动栅多晶硅厚度及表面形态对器件的电性参数及后续工艺影响较大,因此怎样得到一个稳定、厚度均匀及表面形态佳的浮动栅多晶硅显得至关重要。文章就以在90nm嵌入式闪存开发浮动栅...