一种用于驻极体麦克风的CT-SC ∑-△调制器

传统的模拟麦克风由于自身抗干扰能力差,很难满足新一代音频系统对输入端的要求,文章提出了一种用于数字麦克风的CT-SC∑-△调制器技术,将CT积分器和SC积分器结合在一个∑-△调制器中,可以与驻极体麦克风进行无缝连接,能够将麦克风产生模拟信号直接转换成后续数字设计平台所需的数字信号.测试结果表明,CT-SC∑-△调制器动态范围达到88 dB,等效输入参考噪声为5 μV,正常工作功耗为540 μw,休眠模式下消耗电流不超过10μA;与传统模拟麦克风相比,CT-SC∑-△调制器构成的数字麦克风可以提供更好的信噪比、更高的集成度、更低的功耗和更强的抗干扰能力.     

一种用于MEMS麦克风的信号采集电路

设计了一款用于MEMS麦克风的模数转换接口电路。该电路包含一个前置放大器和一个四阶Delta-Sigma调制器。前置放大器包括一个pMOS输入的源级跟随器和一个仪表放大器。放大器设计中采用了斩波稳定技术消除低频闪烁噪声。Delta-Sigma调制器采用了带有前馈支路的四阶结构,其优点在于低积分器摆幅,可以降低积分器中放大器的非线性增益对电路性能的影响。该电路采用0.18μm CMOS工艺制作,电源电压为1.65μV。测试结果表明,电路可以达到80 dB的动态范围和73.4 dB的峰值信号对噪声加谐波比。电路的耗散电流为1 500μA,占用的芯片面积为0.48 mm2。     

一种全集成的麦克风可编程增益放大器设计

针对麦克风应用,设计一种全集成、高精度的可编程放大器电路。该电路采用电容增益以及高通滤波器的设计方法,无须片外去耦合电容,实现可编程增益放大器的单片集成。可编程增益放大器电路采用SMIC 0.13μm 1P8M CMOS工艺实现。完成后仿真结果表明,在电源电压1 V,增益18 dB,输入信号频率2 kHz,峰峰值50 mV时,可编程增益放大器动态范围达到73 dB,总谐波失真64 dB,整体功耗206μW,满足麦克风全集成、高精度的应用需求。     

一种新型低噪声麦克风前置放大器的设计

传声器集成电路将接收到的麦克风声音信号转换成电流信号,再由前置放大器放大成电压信号。通常,当声音信号很微弱时,放大器放大声音信号时也放大了噪声,造成被放大的声音信号的信噪比很低。对两种电路进行了仿真试验,比较了Claus前置放大器和Eduard CMOS前置放大器的噪声特点。采用0.18μm CMOS工艺进行仿真,分析了电路的噪声频谱密度,提出了一种改进型CMOS前置放大器,有效地改善了前置放大器的信噪比。     

数字麦克风前置放大器

FAN3850X系列数字麦克风前置放大器,包括16dB或19dB增益FAN3850A和具有温度补偿功能的15dB增益FAN3850T。     

微电流模拟放大器LMV1014

<正> LMV1014是美国国家半导体公司推出的一种三引线驻极体麦克风模拟放大器。这种放大器的电源电流低至38μA(最大不超过50μA),用其替代目前流行的JFET前置放大器装配麦克风,能够有效地延长电池使用寿命。LMV1014的应用领域主要是移动(蓝牙)通信、蜂窝电话、个人数字助理(PDA)、汽车附件和附属麦克风产品。     

新型电容式MEMS加速度计数字接口电路设计

MEMS加速度计接口电路主要采用传统sigma-delta架构实现,但这种方式中的电路失调电压很容易产生积分饱和现象．为解决这个问题,本文设计了一种可以用于钻井、石油勘探等微弱信号检测的新型数字电容接口电路．该设计在电容式MEMS加速度传感器基础上,采用FPGA实现数字三阶环路滤波器,构成5阶sigma-delta系统．采用数字环路滤波器降低了ASIC模拟电路版图设计与芯片测试难度,利于快速优化环路滤波器设计参数,改善系统稳定性和优化系统噪声性能．前置放大器采用一种相对简单的相关双采样技术,能够有效减小前置放大器的失调电压．根据MEMS加速度计前置放大器输出信号符合正态分布的特点,设计了带有一定预测功能的8-bit瞬时浮点ADC,实现模拟与数字环路滤波器互联．在200Hz带宽内,该接口电路系统噪声基底达到53．09ng／rt（Hz）,满足系统噪声设计要求．前置放大器与ADC采用XFAB XH018混合信号CMOS工艺流片,开环测试表明,前置放大器的灵敏度和噪声分别为0．69V／pF和3．20μV／rt（Hz）．     

CD2068CP录音机前置放大电路

ＣＤ2 0 68ＣＰ是一块单卡收录机用前置放大电路 ,内部包含有ＫＡＲＡＯＫＥ混音放大器以及信号源切换等功能。该电路具有如下特点 : 双通道 内部包含前置放大器 ,录音放大器 ,监听放大器 ,混音放大器 麦克风放大器信号可在内部与两通道混合 信号选择器开关包含有 :收音输入 /磁带输入 /混音输入 内部麦克风设定、混音设定可选用六种工作模式麦克风设置 :　　　　　　　　　　　　麦克风混音设置 :1 磁带放音　　　　　　　　　　　　　1 磁带放音与麦克风音2 线路输入、放音　　　　 2 线路输入麦克风混音3 收音、放音　　　　　 3 收音…     

一种用于数字麦克风的低功耗低电压LDO

数字麦克风具有抗干扰能力强、集成度高、易于使用等优点,用于对功耗、体积敏感的便携式设备.研究了用于数字麦克风的低压差线性稳压器(LDO),该LDO除了具有稳压功能,为系统提供稳定和确定的电压外,还能在时钟频率低于休眠频率时,使数字麦克风进入休眠状态.流片测试表明,LDO电压调节范围为1.6～3.5 V,休眠频率为40～60 kHz,芯片待机电流为9μA.     

一种增益可控音频前置放大器电路的设计

设计了一种基于0.5μm CMOS工艺的增益可控音频前置放大器电路。该电路采用直流音量控制方式控制前置放大器的增益,进而实现整体音频放大器的音量控制。外部输入的直流模拟电压经过片内模数转换器转换成数字控制信号,控制前置放大器的输入电阻与反馈电阻的比值,从而实现前置放大器的增益控制。该放大器能够实现32档的音量控制范围,增益从-50 dB变化到25 dB,电路版图面积为1.2 mm×0.8 mm。     

A 540-μW digital pre-amplifier with 88-dB dynamic range for electret microphones

We design a digital pre-amplifier which can be directly connected to an electret microphone. The amplifier can convert analog signals into digital signals, has a wide voltage swing and low power consumption, as is required in portable applications. Measurement results show that the dynamic range of the digital pre-amplifier reaches 88 dB, the equivalent input referred noise is 5 μVrms, the typical power consumption is 540 μW, and in standby mode the current does not exceed 10 μA. Compared with an analog microphone, an electret microphone with digital pre-amplifier offers a better SNR, higher integration, lower power consumption, and higher immunity to system noise.     

驻极体传声器小型前置放大器的设计

传声器是一种将声信号转变为相应的电信号的电声换能器。驻极体传声器是一种用驻极体材料制造的新型传声器。由于驻极体传声器的输出阻抗很高不能直接与音频放大器相接,需要在传声器内接入一只输入阻抗极高的结型场效应三极管来进行阻抗变换。一些小型的驻极体传声器虽然可以将场效应管集成于传声器内部,但是价格高昂;而传统的前置放大器体积又过于庞大。针对此利用现有的技术条件,设计了一种体积小、成本低廉而性能优良的前置放大器。     

A 1.8-V ΔΣ modulator interface for an electretmicrophone with on-chip reference

The design of a delta-sigma (ΔΣ) analog-to-digital converter (ADC) for direct voltage readout of an electret microphone is presented. The ADC is integrated on the same chip with a bandgap voltage reference and is designed to be packaged together with an electret microphone. Having a power consumption of 1.7 mW from a supply voltage of 1.8 V, the circuit is well suited for use in mobile applications. The single-loop, single-bit, fourth-order ΔΣ ADC operates at 64 times oversampling for a signal bandwidth of 11 kHz. The measured dynamic range is 80 dB and the peak signal-to-(noise+distortion) ratio is 62 dB. The harmonic distortion is minimized by using an integrator with an instrumentation amplifier-like input which directly integrates the 125-mV peak single-ended voltage generated by the microphone. A combined continuous-time/switched-capacitor design is used to minimize power consumption     

An ultra-low-power programmable analog bionic ear processor

We report a programmable analog bionic ear (cochlear implant) processor in a 1.5-microm BiCMOS technology with a power consumption of 211 microW and 77-dB dynamic range of operation. The 9.58 mm x 9.23 mm processor chip runs on a 2.8 V supply and has a power consumption that is lower than state-of-the-art analog-to-digital (A/D)-then-DSP designs by a factor of 25. It is suitable for use in fully implanted cochlear-implant systems of the future which require decades of operation on a 100-mAh rechargeable battery with a finite number of charge-discharge cycles. It may also be used as an ultra-low-power spectrum-analysis front end in portable speech-recognition systems. The power consumption of the processor includes the 100 microW power consumption of a JFET-buffered electret microphone and an associated on-chip microphone front end. An automatic gain control circuit compresses the 77-dB input dynamic range into a narrower internal dynamic range (IDR) of 57 dB at which each of the 16 spectral channels of the processor operate. The output bits of the processor are scanned and reported off chip in a format suitable for continuous-interleaved-sampling stimulation of electrodes. Power-supply-immune biasing circuits ensure robust operation of the processor in the high-RF-noise environment typical of cochlear implant systems.     

A low-power high-PSRR current-mode microphone preamplifier

Bionic implants for the deaf require wide-dynamic-range low-power microphone preamplifiers with good wide-band rejection of the supply noise. Widely used low-cost implementations of such preamplifiers typically use the buffered voltage output of an electret capacitor with a built-in JFET source follower. We describe a design in which the JFET microphone buffer's output current, rather than its output voltage, is transduced via a sense-amplifier topology allowing good in-band power-supply rejection. The design employs a low-frequency feedback loop to subtract the dc bias current of the microphone and prevent it from causing saturation. Wide-band power-supply rejection is achieved by integrating a novel filter on all current-source biasing. Our design exhibits 80 dB of dynamic range with less than 5 /spl mu/V/sub rms/ of input noise while operating from a 2.8 V supply. The power consumption is 96 /spl mu/W which includes 60 /spl mu/W for the microphone built-in buffer. The in-band power-supply rejection ratio varies from 50 to 90 dB while out-of-band supply attenuation is greater than 60 dB until 25 MHz. Fabrication was done in a 1.5-/spl mu/m CMOS process with gain programmability for both microphone and auxiliary channel inputs.     

生物医学信号前置放大器的设计与仿真

生物医学信号的振幅微小,频率范围较低,容易受外界干扰而积累大量环境噪声。为了提高测量的精准度,设计了一款高性能的低噪声前置放大器来有效提取生物电信号。前置放大器采用的是基于仪表放大器级联可变增益放大器架构,该架构可以实现对信号的1 000倍放大,并能达到良好的性能指标。仿真结果表明,在1 V的工作电压下,该前置放大器有较低的等效输入参考噪声1.584 2 μV,较低的功耗2.92 μW,适用于生物医学信号采集方面的应用。     

心音、脉搏信号采集、调理电路的设计

心音、脉搏是人体生理及病理的两项重要指标,针对这些信号一般比较微弱、且采集过程中也容易受外界干扰等特点,设计开发了一种能提取微弱心音、脉搏信号的电路。该电路采用驻极体话筒和红外光电法提取心音和脉搏信号,并采取了一系列放大、滤波措施,滤除噪声干扰。该电路较好地解决了外界干扰问题,具有采集数据准确可靠,噪声小,成本低等优点。