A low-power sigma-delta modulator for wireless communication receivers using adaptive biasing circuitry and cascaded comparator scheme

This paper represents the low-power signal-delta (ΣΔ) modulator for wireless communication receiver applications. The 2nd-order modulator has a single-loop structure with 11 quantization levels. An adaptive biasing scheme of the operational amplifier and cascaded comparator scheme are proposed in order to save the power consumption. The DAC with three-level references including the analog ground voltage can make the modulator be implemented with half of the input capacitances without degradation of linearity characteristics with the help of dynamic element matching technique. Peak SNR values of 74 dB and 68 dB are achieved with the input bandwidths of 615 kHz and 1.92 MHz for CDMA-2000 and WCDMA applications, respectively. The modulator is fabricated in a 0.13-μm standard digital CMOS technology and dissipates 4.3 mA for a single supply voltage of 2.8 V. Jinup Lim was born in Seoul, Korea, in 1973. He received the B.S. and the M.S. degrees in semiconductor engineering from University of Seoul, Seoul, Korea, in 1999 and 2001, respectively. From 2001 to 2002, he worked in GCT Semiconductor Inc., Seoul, Korea. He is currently working toward the Ph.D. degree in Electrical & Computer Engineering at the same university. He received the Best student paper award from IEEE SSCS/EDS Seoul Chapter in 2004 and the Samsung Best paper award third prize in ISOCC 2004. His research area is the design of high-performance discrete-time / continuous-time sigma-delta modulator circuits. Joongho Choi was born in Seoul, Korea, in 1964. He received the B.S. and the M.S. degrees in electronics engineering from Seoul National University, Seoul, Korea, in 1987 and 1989, respectively. In 1993, he received Ph.D. degree in electrical engineering from University of Southern California, CA, USA. From 1994 to 1996, he worked in IBM T. J. Watson Research Center, NY, USA. In 1996, he joined the University of Seoul, Seoul, where he is currently a professor in the Department of Electrical & Computer Engineering. His research area is the design of high-performance analog integrated circuits.     

Characteristic Investigation of New Pathological Elements

A characteristic investigation of the new pathological elements (i.e voltage mirror and current mirror) has been presented. Many nullor-mirror equivalences are explored. The circuit cascadability is discussed with nullor and mirror concepts. Also, the conventional inverse network transformation has been extended for applying to the circuits with current mirror output. To demonstrate the use of presented properties, practical examples have been given. The derived circuits have been verified with HSPICE simulation and the simulation results confirm with our theoretical prediction.Hung-Yu Wang was born in Kaohsiung, Taiwan, Republic of China, on January 4, 1969. He received the Ph.D. degree in optical sciences from National Central University, Chung-Li, Taiwan in 2002.Since 1993 he has worked on promoting the prototyping IC implementation of academic researches, and propelling the collaboration of the academia and industries in Chip Implementation Center (CIC), National Science Council of the Republic of China. In 2003 he became a researcher and the deputy director in Division of Chip Implementation Service of CIC. He is currently working on South Region Office of National Chip Implementation Center, National Applied Research Laboratories as a researcher and the department manager. His research interests are in current-mode circuits design, analog IC design and analog IP design.Ching-Ting Lee was born in Taoyuan, Taiwan, R.O.C., on November 1, 1949. He received his B.S. and M.S. in Electrical Engineering Department of the National Cheng-Kung University, Taiwan, in 1972 and 1974, respectively. He received Ph.D. degree in Electrical Engineering Department from the Carnegie-Mellon University, Pittsburgh, PA, in 1982.He worked on Chung Shan Institute of Science and Technology, before he joined the Institute of Optical Sciences, National Central University, Chung-Li, Taiwan, as a Professor in 1990. He works on National Cheng-Kung University as the dean of Electrical Engineering and Computer Science and the professor or the Institute of Microelectronics, Department of Electrical Engineering in 2003. His current research interests include theory, design, and application of guided-wave structures and devices for integrated optics and waveguide lasers. His research activities have also involved in the research concerning semiconductor lasers, photodetectors and high-speed electronic devices, and their associated integration for electrooptical integrated circuits. He received the outstanding Research Professor Fellowship from the National Science Council (NSC), R.O.C. in 2000 and 2002. He also received the Optical Engineering Medal from Optical Engineering Society and Distinguish Electrical Engineering professor award from Chinese Institute of Electrical Engineering Society in 2003.Chun-Yueh Huang was born in Taichung, Taiwan, Republic of China, on March 24, 1967. He received the B.S. degree in industrial education from National Chang Hwa Normal University, Chang Hwa, Taiwan in 1991, M.S. and Ph.D. degrees both in electrical engineering from the National Cheng Kung University, Tainan, Taiwan in 1993 and 1997, respectively. Since 1999 he has been with the Kan Shan University of Technology, where he is currently Associate Professor and Chairman of Department of Electronic Engineering. His biography is included in the 7th Edition (2003–2004) of Who’s Who in Science and Engineering.His current researches include current-mode circuits design, VLSI design, analog IC design and analog IP design.     

CCII-Based Grounded to Floating Immittance Converter and a Floating Inductance Simulator

A new circuit employing second-generation current conveyors (CCIIs), and unmatched resistors for converting a grounded immittance to the corresponding floating immittance with either positive or negative adjustable multiplier, is presented. Moreover, the proposed circuit can also realize a synthetic floating inductance employing a grounded capacitor depending on the passive element selection. Simulation results using 0.35 μ m TSMC CMOS technology parameters are given. Erkan Yuce was born in 1969 in Nigde, Turkey. He received the B.Sc. from Middle East Technical University and M.Sc. degrees from Pamukkale University in 1994 and 1998 respectively. He is a Ph.D. student at Bogazici University all in Electrical and Electronics Engineering. He is currently Research Assistant at the Electrical and Electronics Engineering Department of Bogazici University. His current research interests include analog circuits, active filters, synthetic inductors, and current-mode circuits. He is the author or co-author of about 10 papers published in scientific journals or conference proceedings. Oguzhan Cicekoglu was born in 1963 in Istanbul, Turkey. He received the B.Sc. and M.Sc. degrees from Bogazici University and the Ph.D. degree from Istanbul Technical University all in Electrical and Electronics Engineering in 1985, 1988 and 1996 respectively. He served as lecturer at the School of Advanced Vocational Studies Electronics Prog. of Bogazici University where he held various administrative positions between 1993 and 1999, and as part time lecturer at various institutions. He was with Biomedical Engineering Institute between 1999 and 2001. He is currently Associate Professor at the Electrical and Electronics Engineering Department of Bogazici University. His current research interests include analog circuits, active filters, analog signal processing applications and current-mode circuits. He is the author or co-author of about 150 papers published in scientific journals or conference proceedings. Oguzhan Cicekoglu is a member of the IEEE. Shahram Minaei received his B.Sc. degree in Electrical and Electronics Engineering from Iran University of Science and Technology in 1993. He received his M.Sc. and Ph.D. degrees in Electronics and Communication Engineering from Istanbul Technical University in 1997 and 2001, respectively. He is currently an Associate Professor at the Electronics and Communication Engineering Department of Dogus University in Istanbul, Turkey. He has more than 50 journal or conference papers in scientific review. He served as reviewer for a number of international journals and conferences. His current field of research concerns current-mode circuits and analog signal processing. Shahram Minaei is a member of the IEEE.     

Programmable SC Biquad Using One Single Capacitor Bank

This paper presents a new technique for programming SC circuits using a single time-multiplexed capacitor bank, achieving a significant reduction in capacitance area. Simulation and experimental results obtained with a programmable biquad low pass filter show the validity of the proposed method.Antonio Torralba was born in Seville, Spain. He received the electrical engineering and Ph.D. degrees from the University of Seville, Seville, Spain, in 1983 and 1985, respectively. Since 1983, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, where he has been an Assistant professor, Associate Professor (1987), and Professor (1996). He has published 30 papers in journals and more than 80 papers in conferences. His research interests are in the design and modeling of low-voltage analog circuits, analog and mixed-signal design, analog to digital conversion, and electronic circuits and systems with application to control and communication.Alfredo Pérez Vega-Leal was born in Seville, Spain. He received the Electrical Engineering and Ph.D. degrees from the University of Seville, Seville, Spain, in 1998 and 2003, respectively. Since 1995, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, as research student and became an Associate Professor in 1999. His research interests are related to low-voltage low-power analog circuit design, A/D and D/A conversion.Ramón González Carvajal was born in Seville, Spain. He received the Electrical Engineering and Ph.D. degrees from the University of Seville, Seville, Spain, in 1995 and 1999, respectively. Since 1996, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, where he has been an Associate Professor (1996), and Professor (2002). He has published more than 100 papers in International Journals and Conferences. His research interests are related to low-voltage low-power analog circuit design, A/D and D/A conversion, and analog and mixed signal processing.     

Exploiting Mobility for Energy Efficient Data Collection in Wireless Sensor Networks

We analyze an architecture based on mobility to address the problem of energy efficient data collection in a sensor network. Our approach exploits mobile nodes present in the sensor field as forwarding agents. As a mobile node moves in close proximity to sensors, data is transferred to the mobile node for later depositing at the destination. We present an analytical model to understand the key performance metrics such as data transfer, latency to the destination, and power. Parameters for our model include: sensor buffer size, data generation rate, radio characteristics, and mobility patterns of mobile nodes. Through simulation we verify our model and show that our approach can provide substantial savings in energy as compared to the traditional ad-hoc network approach. Sushant Jain is a Ph.D. candidate in the Department of Computer Science and Engineering at the University of Washington. His research interests are in design and analysis of routing algorithms for networking systems. He received a MS in Computer Science from the University of Washington in 2001 and a B.Tech degree in Computer Science from IIT Delhi in 1999. Rahul C. Shah completed the B. Tech (Hons) degree from the Indian Institute of Technology, Kharagpur in 1999 majoring in Electronics and Electrical Communication Engineering. He is currently pursuing his Ph.D. in Electrical Engineering at the University of California, Berkeley. His research interests are in energy-efficient protocol design for wireless sensor/ad hoc networks, design methodology for protocols and next generation cellular networks. Waylon Brunette is a Research Engineer in the Department of Computer Science and Engineering at the University of Washington. His research interests include mobile and ubiquitous computing, wireless sensor networks, and personal area networks. Currently, he is engaged in collaborative work with Intel Research Seattle to develop new uses for embedded devices and RFID technologies in ubiquitous computing. He received a BS in Computer Engineering from the University of Washington in 2002. Gaetano Borriello is a Professor in the Department of Computer Science and Engineering at the University of Washington. His research interests are in embedded and ubiquitous computing, principally new hardware devices that integrate seamlessly into the user’s environment with particular focus on location and identification systems. His principal projects are in creating manageable RFID systems that are sensitive to user privacy concerns and in context-awareness through sensors distributed in the environment as well as carried by users. Sumit Roy received the B. Tech. degree from the Indian Institute of Technology (Kanpur) in 1983, and the M. S. and Ph. D. degrees from the University of California (Santa Barbara), all in Electrical Engineering in 1985 and 1988 respectively, as well as an M. A. in Statistics and Applied Probability in 1988. His previous academic appointments were at the Moore School of Electrical Engineering, University of Pennsylvania, and at the University of Texas, San Antonio. He is presently Prof, of Electrical Engineering, Univ. of Washington where his research interests center around analysis/design of communication systems/networks, with a topical emphasis on next generation mobile/wireless networks. He is currently on academic leave at Intel Wireless Technology Lab working on high speed UWB radios and next generation Wireless LANs. His activities for the IEEE Communications Society includes membership of several technical committees and TPC for conferences, and he serves as an Editor for the IEEE Transactions on Wireless Communications.     

The Effects of Non-Idealities and Current Limitations on the Simulated Inductances Employing Current Conveyors

Active devices such as current conveyors play an essential role on the performance of simulated inductances. The effects of second-generation current conveyor (CCII) non-idealities on the proposed and on the previously published inductances are investigated, in which lossless inductances are realized. CCIIs like all active devices have terminal current limitations that can not be exceeded. Thus, the values of the applied input current sources for the proposed and previously published inductances depending on the passive elements values and applied signal frequency impose restrictions on the input current of the inductor. Erkan Yuce was born in 1969 in Nigde, Turkey. He received the B.Sc. degree from Middle East Technical University and M.Sc. degree from Pamukkale University in 1994 and 1998 respectively, all in Electrical and Electronics Engineering. He is currently Research Assistant and a Ph.D. student at the Electrical and Electronics Engineering Department of Bogazici University. His current research interests include analog circuits, active filters, synthetic inductors, voltage-mode current-mode circuits. He is the author or co-author of about 4 papers published in scientific journals or conference proceedings Oguzhan Cicekogluwas born in 1963 in Istanbul, Turkey. He received the B.Sc. and M.Sc. degrees from Bogazici University and the Ph.D. degree from Istanbul Technical University all in Electrical and Electronics Engineering in 1985, 1988 and 1996 respectively. He served as lecturer at the School of Advanced Vocational Studies Electronics Prog. of Bogazici University where he held various administrative positions between 1993 and 1999, and as part time lecturer at various institutions. He was with Biomedical Engineering Institute between 1999 and 2001. He is currently Associate Professor at the Electrical and Electronics Engineering Department of Bogazici University. His current research interests include analog circuits, active filters, analog signal processing applications and current-mode circuits. He is the author or co-author of about 150 papers published in scientific journals or conference proceedings. Oguzhan Cicekoglu is a member of the IEEE.     

A low-power, second-order Δ/Σ modulator using a single class-AB op-amp for voice-band applications

The design of a power-efficient second-order Δ/Σ modulator for voice-band is presented. At system level, a new single-loop, single-stage modulator is proposed. The modulator employs only one class-AB op-amp to realize a second-order noise shaping for voice-band applications. The modulator is designed in a 0.25μm standard CMOS process, and exhibits 86 dB dynamic range (DR) for a 4 kHz voice-bandwidth. The proposed modulator consumes 125μW from a 2.5 V supply. Aminghasem Safarian received the B.S. and M.S. degrees in electrical engineering from the Sharif University of Technology, in 2000, 2002, respectively. Since 2003 he is a research assistant at University of California, Irvine, working toward his Ph.D. degree in electrical engineering emphasizing on RF IC design for wireless communication systems. During the summer of 2005, he was with Broadcom Corporation, Irvine, CA, where he developed integrated receivers for RFID and WCDMA applications. Farzad Sahandiesfanjani was born in Tabriz, Iran in 1976. He received the B.S. and M.S. degrees in electronics from Sharif University of Technology, Tehran, Iran, in 1998 and 2000, respectively. The subject of his thesis was the design of 4th order cascade delta-sigma modulator for ADSL Analog Front End. From 1998 to 2003, he was with Emad Semicon Co., Tehran, Iran, where he designed circuits for voice application such as CODEC and SLIC chip. He also designed a 3rd order single loop class-D delta-sigma modulator for audio application. He joined Tripath Technology Inc., San Jose, CA, in 2003 and has been working on the design of analog and mixed-signal circuits for class-T audio power amplifier. He is also author of one patent for inductor-less switching audio power amplifier and also co-author of 3 more pending patents and 4 papers. Payam Heydari (S'98–M'00) received the B.S. and M.S. degrees (with honors) in electrical engineering from the Sharif University of Technology, in 1992, 1995, respectively. He received the Ph.D. degree in electrical engineering from the University of Southern California, in 2001. During the summer of 1997, he was with Bell-Labs, Lucent Technologies, Murray Hill, NJ, where he worked on noise analysis in deep submicron very large-scale integrated (VLSI) circuits. During the summer of 1998, he was with IBM T. J. Watson Research Center, Yorktown Heights, NY, where he worked on gradient-based optimization and sensitivity analysis of custom-integrated circuits. Since August 2001, he has been an Assistant Professor of Electrical Engineering at the University of California, Irvine, where his research interest is the design of high-speed analog, radio-frequency (RF), and mixed-signal integrated circuits. Dr. Heydari has received the 2005 National Science Foundation (NSF) CAREER Award, the 2005 IEEE Circuits and Systems Society Darlington Award, the 2005 Henry Samueli School of Engineering Teaching Excellence Award, the Best Paper Award at the 2000 IEEE International Conference on Computer Design (ICCD), the 2000 Honorable Award from the Department of EE-Systems at the University of Southern California, and the 2001 Technical Excellence Award in the area of Electrical Engineering from the Association of Professors and Scholars of Iranian Heritage (APSIH). He was recognized as the 2004 Outstanding Faculty at the EECS Department of the University of California, Irvine. His name was included in the 2006 Who's Who in America. Dr. Heydari is an Associate Editor of the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—part I. He currently serves on the Technical Program Committees of Custom Integrated Circuits Conference (CICC), International Symposium on Low-Power Electronics and Design (ISLPED), International Symposium on Quality Electronic Design (ISQED), and the Local Arrangement Chair of the ISLPED conference. He was the Student Design Contest Judge for the DAC/ISSCC Design Contest Award in 2003, the Technical Program Committee member of the IEEE Design and Test in Europe (DATE) from 2003 to 2004, and International Symposium on Physical Design (ISPD) in 2003. Mojtaba Atarodi received his Ph.D degree from USC (the University of Southern California, Los Angeles), in electrical engineering Electro-physics in 1993, his M.S from University of California at Irvine, and his B.SEE from the Tehran Polytechnic University with first Grade honor. Following his Ph.D completion, he was with Linear Technology Corporation from 1993 to 1996 as an analog design engineer. He has been with Sharif University of Technology as an Assistant and Visiting Professor since 1997. The Author of more than 50 technical journal and conference papers an a book on Analog CMOS IC Design, Dr Atarodi’s main research interests are analog and RF IC system, circuit, and signal processing design as well as analog synthesis tools. Having held several management and consulting positions during the last 15 years in the US industry, he holds one US patent in analog highly linear tunable Operational Transconductance Amplifiers and has applied for 5 more US patents as well.     

Cross-layer modeling of adaptive wireless links for QoS support in heterogeneous wired-wireless networks

Future wired-wireless multimedia networks require diverse quality-of-service (QoS) support. To this end, it is essential to rely on QoS metrics pertinent to wireless links. In this paper, we develop a cross-layer model for adaptive wireless links, which enables derivation of the desired QoS metrics analytically from the typical wireless parameters across the hardware-radio layer, the physical layer and the data link layer. We illustrate the advantages of our model: generality, simplicity, scalability and backward compatibility. Finally, we outline its applications to power control, TCP, UDP and bandwidth scheduling in wireless networks. The work by Q. Liu and G. B. Giannakis are prepared through collaborative participation in the Communications and Networks Consortium sponsored by the U.S. Army Research Laboratory under the Collaborative Technology Alliance Program, Cooperative Agreement DAAD19-01-2-0011. The U.S. Government is authorized to reproduce and distribute reprints for Government purposes notwithstanding any copyright notation thereon. The work by S. Zhou is supported by UConn Research Foundation internal grant 445157. Qingwen Liu (S’04) received the B.S. degree in electrical engineering and information science in 2001, from the University of Science and Technology of China (USTC). He received the M.S. degree in electrical engineering in 2003, from the University of Minnesota (UMN). He currently pursues his Ph.D. degree in the Department of Electrical and Computer Engineering at the University of Minnesota (UMN). His research interests lie in the areas of communications, signal processing, and networking, with emphasis on cross-layer analysis and design, quality of service support for multimedia applications over wired-wireless networks, and resource allocation. Shengli Zhou (M’03) received the B.S. degree in 1995 and the M.Sc. degree in 1998, from the University of Science and Technology of China (USTC), both in electrical engineering and information science. He received his Ph.D. degree in electrical engineering from the University of Minnesota, 2002, and joined the Department of Electrical and Computer Engineering at the University of Connecticut, 2003. His research interests lie in the areas of communications and signal processing, including channel estimation and equalization, multi-user and multi-carrier communications, space time coding, adaptive modulation, and cross-layer designs. He serves as an associate editor for IEEE Transactions on Wireless Communications since Feb. 2005. G. B. Giannakis (Fellow’97) received his Diploma in Electrical Engineering from the National Technical University of Athens, Greece, 1981. From September 1982 to July 1986 he was with the University of Southern California (USC), where he received his MSc. in Electrical Engineering, 1983, MSc. in Mathematics, 1986, and Ph.D. in Electrical Engineering, 1986. After lecturing for one year at USC, he joined the University of Virginia in 1987, where he became a professor of Electrical Engineering in 1997. Since 1999 he has been a professor with the Department of Electrical and Computer Engineering at the University of Minnesota, where he now holds an ADC Chair in Wireless Telecommunications. His general interests span the areas of communications and signal processing, estimation and detection theory, time-series analysis, and system identification -- subjects on which he has published more than 200 journal papers, 350 conference papers and two edited books. Current research focuses on transmitter and receiver diversity techniques for single- and multi-user fading communication channels, complex-field and space-time coding, multicarrier, ultra-wide band wireless communication systems, cross-layer designs and sensor networks. G. B. Giannakis is the (co-) recipient of six paper awards from the IEEE Signal Processing (SP) and Communications Societies (1992, 1998, 2000, 2001, 2003, 2004). He also received the SP Society’s Technical Achievement Award in 2000. He served as Editor in Chief for the IEEE SP Letters, as Associate Editor for the IEEE Trans. on Signal Proc. and the IEEE SP Letters, as secretary of the SP Conference Board, as member of the SP Publications Board, as member and vice-chair of the Statistical Signal and Array Processing Technical Committee, as chair of the SP for Communications Technical Committee and as a member of the IEEE Fellows Election Committee. He has also served as a member of the IEEE-SP Society’s Board of Governors, the Editorial Board for the Proceedings of the IEEE and the steering committee of the IEEE Trans. on Wireless Communications.     

UHF RF Front-End Circuits in 0.35-μm Silicon on Insulator (SOI) CMOS

In this work, design and measurement results of UHF RF frontend circuits to be used in low-IF and subsampling receiver architectures are presented. We report on three low noise amplifiers (LNA) (i) single-ended (ii) differential (iii) high-gain differential and a double-balanced mixer all implemented in 0.35-μ m SOI (Silicon on Insulator) CMOS technology of Honeywell. These circuits are considered as candidate low-power building blocks to be used in the two fully-integrated receiver chips targeted for deep space communications. Characteristics of square spiral inductors with high quality (Q) factors (as high as 10.8) in SOI CMOS are reported. Single-ended and fully-differential LNA's provide gains of 17.5 dB and 18.74 dB at 435 MHz, respectively. Noise figure of the single-ended LNA is 2.91 dB while the differential LNA's noise figure is 3.25 dB. These results were obtained for the power dissipations of 12.5 mW and 16.5 mW from a 2.5-V supply for the single-ended and differential LNA's, respectively. High-gain low-power differential LNA provides a small-signal gain of 45.6 dB with a noise figure of 2.4 dB at 435 MHz. Total power dissipation of the high gain LNA is 28 mW from a 3.3-V supply. The double-balanced mixer provides a conversion gain of 5.5 dB with a noise figure of 13 dB at 2 MHz IF. The power dissipation of the mixer is 11.5 mW from a 2.5-V supply. The measured responses and the power dissipations of the building blocks meet the requirements of the communications system. The die areas occupied by the single-ended LNA, differential LNA, high-gain LNA and the mixer are 0.6 mm × 1.4 mm, 1 mm × 1.4 mm, 1.4 mm × 1.2 mm and 0.6 mm × 0.9 mm, respectively. Ertan Zencir received the B.Sc. and M.S. degrees in electrical and electronics engineering from Middle East Technical University, Ankara, Turkey, and Ph.D. degree in electrical engineering from Syracuse University, Syracuse, NY in 1995, 1997, and 2003, respectively. He joined the Electrical Engineering and Computer Science Department of University of Wisconsin-Milwaukee as an Assistant Professor in August 2004. 2003). His current research focuses on RFIC and transceiver design for wireless communications. Douglas Te-Hsin Huang was born in Chia-yi Taiwan. He received the B.S. degree in electrical engineering from National Taiwan Ocean University, Kee-lung, Taiwan in 1993, and the M.S. and Ph.D. degrees in electrical engineering from Syracuse University, Syracuse, New York, in 2001 and 2003, respectively. In 2004, he joined Skyworks Solutions Inc., where he is currently an RFIC Design Engineer. His research deals mainly with low-power, infrastructure, analog RFIC, and microwave integrated circuit designs. Besides microwave and semiconductor engineering, Dr. Huang has broad interest in art, music, and philosophy. Ahmet Tekin received his B.S. degree in Electrical Engineering from Bogazici University, Istanbul, Turkey in 2002 and MS degree in Electrical engineering form North Carolina A&T State University, Greensboro, NC. He is currently working towards his PhD degree at University of California, Santa Cruz, CA. He was a Research Assistant at RF Microelectronic Laboratory, North Carolina A&T State University, from 2002 to 2004. He worked on the design of low power UHF transceiver circuits for space applications. He is currently a Research Assistant at Bio-mimetic Microelectronic Systems Laboratory, University of California at Santa Cruz, working on implantable very low power UHF frequency transceiver for a body sensor network. Numan S. Dogan received the B.Sc. degree from Karadeniz Technical University, Trabzon, Turkey, in 1975, the M.Sc. degree from Polytechnic University, New York, in 1979, and the PhD degree from the University of Michigan, Ann Arbor, in 1986, all in electrical engineering. Since 1998, he has been with the Electrical and Computer Engineering Department, North Carolina A&T State University, Greensboro, North Carolina, where he is an Associate Professor. He was a Visiting Faculty Researcher at Air Force Research Laboratory (AFRL), Eglin Air Force Base, Florida, in 1998, and General Electric Corporate Research and Development Laboratory, Schenectady, New York, in 1999. His earlier research interests included microwave and millimeter-wave solid-state devices and circuits, high-temperature electronics, and silicon micromachining. His recent research interests include RF CMOS Integrated Circuits and low-power Medical Implant Communication Systems (MICS) transceivers. Currently he serves as the Chair of the IEEE Central North Carolina Section. In April 2004, he organized “a walking robot competition” for High School Students. He enjoys hiking to Alpine Lakes in the Pacific Northwest and fishing. Ercument Arvas (M'85–SM'89) received the B.S. and M.S. degrees from METU, Ankara, Turkey, in 1976 and 1979, respectively, and the Ph.D. degree from Syracuse University, Syracuse, New York, in 1983, all in Electrical Engineering. Between 1984 and fall of 1987, he was with the Electrical Engineering Department of Rochester Institute of Technology, Rochester, New York. He joined the Electrical Engineering and Computer Science Department of Syracuse University in 1987, where he is currently a Professor. His research interests include numerical electromagnetics, antennas, and microwave circuits and devices.     

Electronic Implementation of Multirate Sigma-Delta Modulators Using CMOS Technologies

Multirating has been recently proposed to reduce the frequency rate of the first integrator(s) of a single-loop, or the first stage(s) of a cascade, Sigma-Delta modulator (SDM). This is a promising technique for the design of high speed, low-power modulators, as the first integrator (or stage) in the chain primarily determines the performances of the modulator, as well as its power consumption. This paper presents the first implementation of a 2nd-order multirate SDM, showing different circuit solutions. The experimental results obtained with a prototype in a standard 0.6 μm CMOS technology shows that different clock rates can be selected for each integrator of a SDM. Alfredo Pérez Vega-Leal was born in Seville, Spain. He received the Telecommunications Engineering and Ph.D. degrees from the University of Seville, Seville, Spain, in 1998 and 2003, respectively. Since 1995, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, as research student and became an Associate Professor in 1999. His research interests are related to low-voltage low-power analog circuit design, A/D and D/A conversion. Francisco Colodro was born in Peal de Becerro (Jaén), Spain, in 1968. He received the Ingeniero de Telecomunicación degree from the University of Vigo, Vigo, Spain, in 1992, and the Ph.D. degree from the University of Sevilla, Sevilla, Spain, in 1997. In 1992 he joined the Department of Electronics Engineering, University of Sevilla, where he is currently and Associate Professor. His research interests are in the architectural study of Σ Δ modulators, the implementation of ADCs based on Σ Δ modulators, and application of electronic circuits and systems to communication. Marta Laguna was born in Seville, Spain. She received the Telecommunications Engineering degree from the University of Seville in 2002. She is currently working toward the Ph.D. degree. Her doctoral work focuses on the design of continuous-time sigma-delta modulators. Since 2001, she has been with the Department of Electronic Engineering, School of Engineering, University of Seville, as research student and became an assistant teacher in 2004. Her research interests are high-speed analog-to-digital converters and sigma-delta modulators. Antonio Torralba (M'89–SM'02) was born in Sevilla, Spain, in 1960. He received the electrical engineering and Ph.D. degrees from the University of Sevilla in 1983, and 1985, respectively. Since 1983 he has been with the Department of Electronics Engineering, School of Engineering, University of Sevilla, where he has been Associate Professor in 1987, and Full Professor since 1996, leading a research group on mixed signal design. In 1999 he made a short stay at the Department of Electrical Engineering, NMSU, and he is presently in the Department of Electrical Engineering, TAMU for a Sabbatical stay. His interests include low-voltage analog circuits and systems, analog to digital conversion, Σ Δ modulators, and electronic circuits and systems with application to control and communication. In these fields he has published around 40 journal papers and more than 100 conference papers, and he holds 2 international patents.     

BER Performance of Wireless BPSK Communication System in Tunnels With and Without Traffic

The bit error rate (BER) performance for high-speed personal communication service in tunnels with and without traffic is investigated. The impulse responses of tunnels for any transmitter–receiver location are computed by shooting and bouncing ray/image techniques. By using the impulse responses of these multipath channels, the BER performance of BPSK (binary phase shift keying) system with phase and timing recovery circuits are calculated. Numerical results have shown that the multipath effect by the vehicles in the tunnel is an important factor for BER performance. In addition, the effect of space diversity techniques and decision feedback equalizer on mitigating the multipath fading is also investigated.Chien-Hung Chen was born in Kaohsiung, Taiwan, Republic of China, on 8 March 1971. He received the MSEE degree from Tamkang University in 1999. He is studying for Ph.D. degree in the Department of Electrical Engineering, Tamkang University. His current research interests include indoor wireless communications and numerical techniques in electromagnetics.Chien-Ching Chiu was born in Taoyuan, Taiwan, Republic of China, on 23 January 1963. He received the BSCE degree from National Chiao Tung University, Hsinchu, Taiwan, in 1985 and MSEE and PhD degrees from National Taiwan University, Taipei, Taiwan, in 1987 and 1991, respectively. From 1987 to1989, he served in the ROC Army Force as a communication officer. In 1992 he joined the faculty of the Department of Electrical Engineering, Tamkang University, where he is now an Professor. He was a visiting scholar at the MIT and University of Illinois, Urbana from 1998 to 1999. His current research interests include microwave imaging, numerical techniques in electromagnetics and indoor wireless communications.Shi-Cheng Hung received the MSEE degree from Tamkang University in 1998. He is now a RF engineer. His current research interests include indoor wireless communications and numerical techniques in electromagnetics.Chien-Hung Lin received the MSEE degree from Tamkang University in 2001. He is now a RF engineer. His current research interests include indoor wireless communications and numerical techniques in electromagnetics.     

Dose control circuit for digital electrostatic electron-beam array lithography

This paper demonstrates a technique for controlling the electron emission of an array of field emitting vertically aligned carbon nanofibers (VACNFs). An array of carbon nanofibers (CNF) is to be used as the source of electron beams for lithography purposes. This tool is intended to replace the mask in the conventional photolithography process by controlling their charge emission using the “Dose Control Circuitry” (DCC). The large variation in the charge emitted between CNFs grown in identical conditions forced the controller design to be based on fixed dose rather than on fixed time. Compact digital control logic has been designed for controlling the operation of DCC. This system has been implemented in a 0.5 μm CMOS process. Chandra Sekhar A. Durisety received his B.E. (Hons.) Instrumentation from Birla Institute of Technology and Sciences, Pilani, India in 1997 and his M.S in Electrical Engineering from University of Tennessee, Knoxville in 2002. Since 2003, he has been working towards his Ph.D degree also in Electrical Engineering at Integrated Circuits and Systems Lab (ICASL), University of Tennessee, Knoxville. He joined Wipro Infotech Ltd, Global R & D, Bangalore, India in 1997, where he designed FPGA based IPs for network routers. Since 1999, he was involved in the PCI bridge implementation at CMOS chips Inc, Santa Clara, CA, and the test bench development for Sony’s MP3 player, while at Toshiba America Electronic Components Inc., San Jose, CA. His research interests include multi-stage amplifiers, data converters, circuits in SOI and Floating Gate Devices. Rajagopal Vijayaraghavan received the B.E degree in electronics and communication engineering from Madras University in 1998 and the M.S degree in electrical engineering from the University of Texas, Dallas in 2001.He is currently working towards the Ph.D degree in electrical engineering at the University of Tennessee. His research interest is in the area of CMOS Analog and RF IC design. His current research focuses on LNAs and VCOs using SOI based MESFET devices. Lakshmipriya Seshan was born in Trivandrum, India on April 30, 1979. She received her B.tech in Electronincs & Communication Engg from Kerala University, India in June 2000 and M.S in Electrical Engg from University of Tennessee in 2004. In 2004, she joined Intel Corporation as an Analog Engineer, where she is engaged in the design of low power, high speed analog circuits for various I/O interface topologies. Syed K. Islam received his B.Sc. in Electrical and Electronic Engineering from Bangladesh University of Engineering and Technology (BUET) and M.S. and Ph.D. in Electrical and Systems Engineering from the University of Connecticut. He is presently an Associate Professor in the Department of Electrical and Computer Engineering at the University of Tennessee, Knoxville. Dr. Islam is leading the research efforts of the Analog VLSI and Devices Laboratory at the University of Tennessee. His research interests are design, modeling and fabrication of microelectronic/optoelectronic devices, molecular scale electronics and nanotechnology, biomicroelectronics and monolithic sensors. Dr. Islam has numerous publications in technical journals and conference proceedings in the areas of semiconductors devices and circuits. Benjamin J. Blalock received his B.S. degree in electrical engineering from The University of Tennessee, Knoxville, in 1991 and the M.S. and Ph.D. degrees, also in electrical engineering, from the Georgia Institute of Technology, Atlanta, in 1993 and 1996 respectively. He is currently an Assistant Professor in the Department of Electrical and Computer Engineering at The University of Tennessee where he directs the Integrated Circuits and Systems Laboratory (ICASL). His research focus there includes analog IC design for extreme environments (both wide temperature and radiation immune), multi-gate transistors and circuits on SOI, body-driven circuit techniques for ultra low-voltage analog, mixed-signal/mixed-voltage circuit design for systems-on-a-chip, and bio-microelectronics. Dr. Blalock has co-authored over 60 published refereed papers. He has also worked as an analog IC design consultant for Cypress Semiconductor Corp. and Concorde Microsystems Inc.     

Decentralized Utility-based Sensor Network Design

Wireless sensor networks consist of energy-constrained sensor nodes operating unattended in highly dynamic environments. In this paper, we advocate a systematic decentralized approach towards the design of such networks based on utility functions. A local utility function is defined for each sensor node in the network. While each sensor node “selfishly” optimizes its own utility, the network as a “whole” converges to a desired global objective. For the purpose of demonstrating our approach, we consider the following two separate case studies for data gathering in sensor networks: (a) construction of a load balanced tree and (b) construction of an energy balanced tree. Our work suggests a significant departure from the existing view of sensor networks as consisting of cooperative nodes, i.e. “selfish”sensor nodes is a useful paradigm for designing efficient distributed algorithms for these networks. Narayanan Sadagopan received the B.S. degree in computer science from the Regional Engineering College, Trichy, India, in 1998, and the M.S. degree in computer science from University of Southern California (USC), Los Angeles, in 2001. He is currently working toward the Ph.D. degree in the Computer Science Department, USC. His research is focused on theoretical aspects of wireless ad hoc and sensor networks. Mitali Singh received the BTech. degree in Computer Science and Engineering from the Indian Institute of Technology, New Delhi, India in 2000, and the M.S. degree in Computer Science from the University of Southern California, Los Angeles, USA. She is currently working towards the Ph.D. degree in Computer Science at the University of Southern California. Her research interests lie in the area of applied theory and networks. Presently, her work is focused on high level modeling and distributed algorithm design for wireless sensor systems. Bhaskar Krishnamachari received the B.E.E.E. degree from The Cooper Union for the Advancement of Science and Art, New York, in 1998, and the M.S.E.E. and Ph.D. degrees in electrical engineering from Cornell University, Ithaca, NY, in 1999 and 2002, respectively. He is now an Assistant Professor in the Department of Electrical Engineering, University of Southern California, Los Angeles, where he also holds a joint appointment in the Department of Computer Science. His current research is focused on the discovery of fundamental principles and the analysis and design of protocols for next-generation wireless sensor networks.     

Cascode Monolithic DC-DC Converter for Reliable Operation at High Input Voltages

A CMOS OTA-C low-pass notch filter for EEG application is described. The pass-band covers four bands of brain wave and provides more than 65 dB attenuation for the 50 Hz power line interference. The OTA works in the weak inversion region and a low transconductance of 3 nA/V is achieved. The low transconductance enables using small capacitors in the OTA-C filter so that the filter is suitable for the multi-channel EEG integrated circuits. The measured results show the good performance of the filter for filtering the noise in acquired EEG signals. Xinbo Qian received the B.Sc. degree from Beijing Institute of Technology, P.R. China, in 1991 and M.Sc. degree from Institute of Physics, Chinese Academy of Sciences, in 1996. From 1996 to 1999, she was a research engineer in the Institute of Acoustics, Chinese Academy of Sciences, worked on the sonar signal receiving and processing systems. Since 1999, she has been pursuing the Ph.D. degree in Electrical and Computer Engineering department, National University of Singapore, with research direction on on-chip readout circuits for microbolometer focal plane arrays. Now she is employed by Department of Mechanical Engineering and Division of Bioengineering, National University of Singapore as a research fellow. Her research interest is low-noise integrated circuits design and bio-medical sensor electronics, including electroencephalography IC, magnetocardiography IC, low-noise amplifier, filter and data converters etc. Yong Ping Xu graduated from Nanjing University, P.R. China in 1977. He received his Ph.D. from University of New South Wales (UNSW) Australia, in 1994. From 1978 to 1987, he was with Qingdao Semiconductor Research Institute, P.R. China, initially as an IC design engineer, and later the deputy R&D manager and the Director. From 1989 to 1992, he was working on silicon diode based infrared detectors towards his Ph.D. at School of Electrical Engineering, UNSW Australia. From 1993 to 1995, he worked on an industry collaboration project with GEC Marconi, Sydney, Australia, at the same university, involved in design of sigma-delta ADCs. He was a lecturer at University of South Australia, Adelaide, Australia from 1996 to 1998. He has been with the Department of Electrical and Computer Engineering, National University of Singapore since June 1998 and is now an Associate Professor. His general research interests are in the areas of mixed-signal and RF integrated circuits, and integrated MEMS and sensing systems. His current focuses are high-speed wideband ADC, UWB front-end circuits and low-power low-voltage integrated circuits for biomedical applications. He is a Senior Member of IEEE. Xiaoping Li received his Ph.D. degree from Department of Mechanical and Manufacturing Engineering, University of New South Wales, Australia in 1991, and joined the National University of Singapore in 1992, where he is currently an Associate Professor with the Department of Mechanical Engineering and Division of Bioengineering. He was a visiting professor of Tokyo Institute of Technology, Japan in 2000, and visiting professor of Georgia Institute of Technology, USA in 2001. He is a member of American Society of Mechanical Engineers (ASME), a senior member of Society of Manufacturing Engineering (SME) and a senior member of North American Manufacturing Research Institute/SME, and is currently the Chairman of SME Singapore Chapter. His current research interests include neurosensors and nanomachining. He is a guest editor of International Journal of Computer Applications in Technology, USA. He is a regular reviewer of the ASME Journal of Manufacturing Engineering, USA, Transactions of NAMRI/SME, USA, Journal of materials processing technology, UK, International Journal of Machine Tools and Manufacture, UK, and IMechE Journal of Engineering Manufacture, UK.     

A Scheduling Framework for UWB & Cellular Networks

The max-min fair scheduling problem in wireless ad-hoc networks is a non-convex optimization problem. A general framework is presented for this optimization problem and analyzed to obtain a dual problem, which involves solving a series of optimization sub-problems. In the limit of infinite bandwidth ( ), the scheduling solution reduces to simultaneous transmission (spread spectrum) on all links (Negi and Rajeswaran, INFOCOM '04 (March 2004)). This motivates the analysis of the scheduling problem in the Ultra Wide Band (UWB) regime ( , but finite), a model for certain practical radios. A quadratic (in 1/W) lower bound to the single link capacity function is developed, which simplifies the dual sub-problem to a quadratic optimization (Negi and Rajeswaran, GLOBECOM '04, (Dec. 2004)). The solution to this sub-problem is then obtained under both total power and power spectral density constraints. This solution is utilized to iteratively construct the schedule (sub-band sizes) and power allocation, thus optimally solving the UWB max-min fair scheduling problem, to within any desired precision. Simulations on medium sized networks demonstrate the excellent performance of this scheme. A cellular architecture (not necessarily UWB) may also be considered in this framework. It is proved that Frequency Division Multiple Access is the optimal scheduling for a multi-band cellular architecture. This work was supported in part by the National Science Foundation under Career award 0347455. Arjunan Rajeswaran received his Masters degree in Electrical and Computer Engineering from Carnegie Mellon University in 2003. Since August 2003, he has been pursuing his doctoral research at Carnegie Mellon. His reserach interests lie in the area of wireless networks. His focus is in the application of information and communication theoretic tools towards wireless network design. Several IEEE publications reflect his curent research on Medium Access Control design and performance. Arjunan received the best student paper award at IEEE/ACM Broadnets 2004. Gyouhwan Kim received his B.S. and M.S. degree in Electronic Engineering from Sogang University in Korea, in 1994 and 1996, respectively. Since 1996, he has been working in the CDMA cellular system development team in Samsung Electronics. Currently, he is also working toward the Ph.D degree in the Department of Electrical and Computer Engineering at Carnegie Mellon University. His main research interests are in wireless networks and communication theory. Rohit Negi received the B.Tech. degree in Electrical Engineering from the Indian Institute of Technology, Bombay, India in 1995. He received the M.S. and Ph.D. degrees from Stanford University, CA, USA, in 1996 and 2000 respectively, both in Electrical Engineering. He has received the President of India Gold medal in 1995. Since 2000, he has been with the Electrical and Computer Engineering department at Carnegie Mellon University, Pittsburgh, PA, USA, where he is an Assistant Professor. His research interests include signal processing, coding for communications systems, information theory, networking, cross-layer optimization and sensor networks.     

1.1 V Low-Power ΣΔ Modulator for 14-bit, 16 KHz A/D Conversion Using a New Low-Voltage Class-AB Op-amp

This paper presents the implementation of a second order modulator for a 1.1 V supply voltage. A new class-AB CMOS operational amplifier has been designed in order to achieve high-resolution under very-low-voltage operation. The modulator has been implemented using a 0.35 m CMOS technology with 0.65 V transistor threshold voltage. Experimental results show 14 bits of resolution over 16 kHz nyquist rate with an oversampling ratio of 160.Fernando Muñoz Chavero was born in El Saucejo, Sevilla, Spain. He received the Telecommunications Engineering and Ph.D. degrees from the University of Seville, Seville, Spain, in 1998 and 2002, respectively. Since 1997, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, where he has been an Associate Professor (1999). His research interests are related to low-voltage low-power analog circuit design, A/D and D/A conversion, and analog and mixed signal processing.Alfredo Pérez Vega-Leal was born in Seville, Spain. He received the Telecommunications Engineering and Ph.D. degrees from the University of Seville, Seville, Spain, in 1998 and 2003, respectively. Since 1995, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, as research student and became an Associate Professor in 1999. His research interests are related to low-voltage low-power analog circuit design, A/D and D/A conversion.Ramón González Carvajal was born in Seville, Spain. He received the Electrical Engineering and Ph.D. degrees from the University of Seville, Seville, Spain, in 1995 and 1999, respectively. Since 1996, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, where he has been an Associate Professor (1996), and Professor (2002). He has published more than 100 papers in International Journals and Conferences. His research interests are related to low-voltage low-power analog circuit design, A/D and D/A conversion, and analog and mixed signal processing.Antonio Torralba was born in Seville, Spain. He received the electrical engineering and Ph.D. degrees from the University of Seville, Seville, Spain, in 1983 and 1985, respectively. Since 1983, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, where he has been an Assistant professor, Associate Professor (1987), and Professor (1996). He has published 30 papers in journals and more than 80 papers in conferences. His research interests are in the design and modeling of low-voltage analog circuits, analog and mixed-signal design, analog to digital conversion, and electronic circuits and systems with application to control and communication.Jonathan Noel Tombs was born in Oxford, UK. He received the Electrical Engineering and Ph.D. degrees from Oxford University, UK, in 1987 and 1991, respectively. Since 1993, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, where he has been an Associate Professor (1997), and Professor (2002). He has published more than 50 papers in International Journals and Conferences. His research interests are related to Digital Design and system verification with VHDL, low-voltage low-power analog circuit design, A/D and D/A conversion and analog and mixed signal processing.Jaime Ramírez-Angulo is currently Klipsch Distinguished Professor, IEEE fellow and Director of the Mixed-Signal VLSI lab at the Klipsch School of Electrical and Computer Engineering, New Mexico State University (Las Cruces, New Mexico), USA. He received a degree in Communications and Electronic Engineering (Professional degree), a M.S.E.E. from the National Polytechnic Institute in Mexico City and a Dr.-Ing. degree form the University of Stuttgart in Stuttgart, Germany in 1974, 1976 and 1982 respectively. He was professor at the National Institute for Astrophysics Optics and Electronics (INAOE) and at Texas A&M University. His research is related to various aspects of design and test of analog and mixed-signal Very Large Scale Integrated Circuits.     

A new pipelined analog-to-digital converter using current conveyors

A new pipelined analog-to-digital converter (ADC) using second-generation current conveyor (CCII) is presented. Two main building blocks of the pipelined ADC, sample-and-hold (S/H) circuit and multiplying digital-to-analog converter (MDAC) are constructed of CCII instead of operational amplifier (OA). Experimental results show that the proposed CCII-based pipelined ADC can work at 12.5 MHz with a 7.3-bit resolution. The DNL is within −0.4 LSB and 0.4 LSB and INL is within −0.8 LSB and 0.8 LSB, respectively. The pipelined ADC is realized in TSMC 0.35 μm CMOS technology and consumes 29 mW under a 3.3 V power supply. The core size is 0.85×0.85 mm². Sing-Yen Wu received the M.S. degree in the Department of Electronic Engineering from National Taipei University of Technology, Taipei, Taiwan, in 2005. His current research interests include CMOS pipelined analog-to-digital converters and mixed-signal integrated circuit. Lu-Po Liao received the M.S. degree in the Department of Electronic Engineering from National Taipei University of Technology, Taipei, Taiwan, in 2003. His current research interests include analog integrated circuit design and mixed-signal integrated circuit design. Chia-Chun Tsai received the Ph.D. degrees in Electrical Engineering from National Taiwan University, Taipei, Taiwan, 1991. From 1989 to 2005, he served at the Department of Electronic Engineering, National Taipei University of Technology, Taipei, Taiwan. Since 2005 he has been with the Department of Computer Science and Information Engineering, Nanhua University, Chiayi, Taiwan, where he is a Full Professor. His current research interests include VLSI design automation and mixed-signal IC designs.     

Statistical multiplexing, admission region, and contention window optimization in multiclass wireless LANs

This paper presents an analytical model for evaluating the statistical multiplexing effect, admission region, and contention window design in multiclass wireless local area networks (WLANs). We consider distributed medium access control (MAC) which provisions service differentiation by assigning different contention windows to different classes. Mobile nodes belonging to different classes may have heterogeneous traffic arrival processes with different quality of service (QoS) requirements. With bursty input traffic, e.g. on/off sources, our analysis shows that the WLAN admission region under the QoS constraint can be significantly improved, when the statistical multiplexing effect is taken into account. We also analyze the MAC resource sharing between the short-range dependent (SRD) on/off sources and the long-range dependent (LRD) fractional Brownian motion (FBM) traffic, where the impact of the Hurst parameter on the admission region is investigated. Moveover, we demonstrate that the proper selection of contention windows plays an important role in improving the WLAN’s QoS capability, while the optimal contention window for each class and the maximum admission region can be jointly solved in our analytical model. The analysis accuracy and the resource utilization improvement from statistical multiplexing gain and contention window optimization are demonstrated by extensive numerical results. Yu Cheng received the B.E. and M.E. degrees in Electrical Engineering from Tsinghua University, Beijing, China, in 1995 and 1998, respectively, and the Ph.D. degree in Electrical and Computer Engineering from the University of Waterloo, Waterloo, Ontario, Canada, in 2003. From September 2004 to July 2006, he was a postdoctoral research fellow in the Department of Electrical and Computer Engineering, University of Toronto, Ontario, Canada. Since August 2006, he has been with the Department of Electrical and Computer Engineering, Illinois Institute of Technology, Chicago, Illinois, USA, as an Assistant Professor. His research interests include service and application oriented networking, autonomic network management, Internet performance analysis, resource allocation, wireless networks, and wireless/wireline interworking. He received a Postdoctoral Fellowship Award from the Natural Sciences and Engineering Research Council of Canada (NSERC) in 2004. Xinhua Ling received the B. Eng. degree in Radio Engineering from Southeast University, Nanjing, China in 1993 and the M. Eng. degree in Electrical Engineering from the National University of Singapore, Singapore in 2001. He is currently pursuing the Ph.D. degree in the Department of Electrical and Computer Engineering at the University of Waterloo, Ontario, Canada. From 1993 to 1998, he was an R&D Engineer in Beijing Institute of Radio Measurement, China. From February 2001 to September 2002, he was with the Centre for Wireless Communications (currently Institute for Infocom Research), Singapore, as a Senior R&D Engineer, developing the protocol stack for UE in the UMTS system. His general research interests are in the areas of cellular, WLAN, WPAN, mesh and ad hoc networks and their internetworking, focusing on protocol design and performance analysis. Lin X. Cai received the B.Sc. degree in computer science from Nanjing University of Science and Technology, Nanjing, China, in 1996 and the MASc. degree in electrical and computer engineering from the University of Waterloo, Waterloo, Canada, in 2005. She is currently working toward the Ph.D. degree in the same field at the University of Waterloo. Her current research interests include network performance analysis and protocol design for multimedia applications over wireless networks. Wei Song received the B.S. degree in electrical engineering from Hebei University, China, in 1998 and the M.S. degree in computer science from Beijing University of Posts and Telecommunications, China, in 2001. She is currently working toward the Ph.D. degree at the Department of Electrical and Computer Engineering, University of Waterloo, Canada. Her current research interests include resource allocation and quality-of-service (QoS) provisioning for the integrated cellular networks and wireless local area networks (WLANs). Weihua Zhuang received the Ph.D. degree in electrical engineering from the University of New Brunswick, Canada. Since October 1993, she has been with the Department of Electrical and Computer Engineering, University of Waterloo, Canada, where she is a Professor. Dr. Zhuang is a co-author of the textbook Wireless Communications and Networking (Prentice Hall, 2003). Her current research interests include multimedia wireless communications, wireless networks, and radio positioning. She received the Outstanding Performance Award in 2005 and 2006 from the University of Waterloo and the Premier’s Research Excellence Award in 2001 from the Ontario Government for demonstrated excellence of scientific and academic contributions. She is the Editor-in-Chief of IEEE Transactions on Vehicular Technology and an Editor of IEEE Transactions on Wireless Communications. Xuemin (Sherman) Shen received the B.Sc.(1982) degree from Dalian Maritime University (China) and the M.Sc. (1987) and Ph.D. degrees (1990) from Rutgers University, New Jersey (USA), all in electrical engineering. He is a Professor and the Associate Chair for Graduate Studies, Department of Electrical and Computer Engineering, University of Waterloo, Canada. His research focuses on mobility and resource management in interconnected wireless/wired networks, UWB wireless communications systems, wireless security, and ad hoc and sensor networks. He is a co-author of three books, and has published more than 300 papers and book chapters in wireless communications and networks, control and filtering. Dr. Shen serves as the Technical Program Committee Chair for IEEE Globecom’07, General Co-Chair for Chinacom’07 and QShine’06, the Founding Chair for IEEE Communications Society Technical Committee on P2P Communications and Networking. He also serves as a Founding Area Editor for IEEE Transactions on Wireless Communications; Associate Editor for IEEE Transactions on Vehicular Technology; KICS/IEEE Journal of Communications and Networks; Computer Networks (Elsevier); ACM/Wireless Networks; and Wireless Communications and Mobile Computing (John Wiley), etc. He has also served as Guest Editor for IEEE JSAC, IEEE Wireless Communications, and IEEE Communications Magazine. Dr. Shen received the Excellent Graduate Supervision Award in 2006, and the Outstanding Performance Award in 2004 from the University of Waterloo, the Premier’s Research Excellence Award in 2003 from the Province of Ontario, Canada, and the Distinguished Performance Award in 2002 from the Faculty of Engineering, University of Waterloo. Dr. Shen is a registered Professional Engineer of Ontario, Canada. Alberto Leon-Garcia received the B.S., M.S., and Ph.D. degrees in electrical engineering from the University of Southern California, in 1973, 1974, and 1976 respectively. He is a Full Professor in the Department of Electrical and Computer Engineering, University of Toronto, ON, Canada, and he currently holds the Nortel Institute Chair in Network Architecture and Services. In 1999 he became an IEEE fellow for “For contributions to multiplexing and switching of integrated services traffic”. Dr. Leon-Garcia was Editor for Voice/Data Networks for the IEEE Transactions on Communications from 1983 to 1988 and Editor for the IEEE Information Theory Newsletter from 1982 to 1984. He was Guest Editor of the September 1986 Special Issue on Performance Evaluation of Communications Networks of the IEEE Selected Areas on Communications. He is also author of the textbooks Probability and Random Processes for Electrical Engineering (Reading, MA: Addison-Wesley), and Communication Networks: Fundamental Concepts and Key Architectures (McGraw-Hill), co-authored with Dr. Indra Widjaja.     

Design and implementation of an optimised wireless pressure sensor for biomedical application

This paper presents design and implementation of a wireless pressure sensor system for biomedical application. The system consists of a front-end Micro-Electro- Mechanical System (MEMS) sensing capacitor along with an optimised MEMS-based oscillator for signal conditioning circuit. In this design, vertical fringed comb capacitor is employed due to the advantages of smaller area, higher linearity and larger full scale change in capacitance compared to parallel plate counterparts. The MEMS components are designed in Coventorware design suite and their Verilog-A models are extracted and then imported to Cadence for co-simulation with the CMOS section of the system using AMI 0.6-micron CMOS process. In this paper, an optimisation method to significantly reduce the system power consumption while maintaining the system performance sufficient is also proposed. A phase noise optimisation approach is based on the algorithm to limit the oscillator tail current. Results show that for the pressure range of 0–300 mmHg the device capacitance range of 1.31 pF – 1.98 pF is achieved which results in a frequency sweep of 2.54 GHz – 1.95 GHz. Results also indicate that a 42% reduction of power consumption is achieved when the optimisation algorithm is applied. This characteristic makes the sensor system a better candidate for wireless biomedical applications where power consumption is the major factor. Hai Phuong Le received his B.E. (Hons) degree in Electronic and Computer System Engineering from University of Tasmania, Hobart, Australia in 2000. He received his Ph.D. degree in Microelectronics from Victoria University, Melbourne, Australia in 2005. At present, he is a post-doctoral research fellow and lecturer in the Centre for Telecommunications and Microelectronics, Victoria University. His research and teaching interests include data acquisition system, mixed-signal integrated circuit design and wireless smart sensor systems. Kriyang Shah received his B.E. Degree in Electronics and Communication Engineering from Sardar Patel University, Vallabh Vidyanagar, Gujarat, India and his Master Degree in Microelectronics in 2004. He is currently a Ph.D. research student in the Centre for Telecommunications and Microelectronics, Victoria University, Melbourne, Australia. His research interests include MEMS Sensors, RF MEMS, process integration for MEMS and CMOS and MEMS-CMOS co-simulation. Jugdutt (Jack) Singh received his B.Sc. in Electronics Engineering from University of Brighton, UK and M.Sc. in Electronics Engineering from University of Alberta, Canada in 1978 and 1986 respectively. He completed his Ph.D. at Victoria University, Australia in 1997. Since 1989 he has been at Victoria University, Melbourne, Australia. Currently he is a Professor of Microelectronics in the Centre for Telecommunications and Microelectronics at Victoria University. His major area of research interests are in the RF, analog and mixed signal design, reconfigurable architectures, low power VLSI circuits and systems design. He has published number of articles in education and research in microelectronics and small technologies area. Aladin Zayegh received his B.E. degree in Electrical Engineering from Aleppo University in 1970 and Ph.D. degree from Claude Bernard University, France in 1979. In 1980, he joined the Faculty of Engineering, Tripoli, Libya. Since 1984 he has held lecturing position at Victoria University, Melbourne, Australia. He is currently an Associate Professor and the Head of School in the School of Electrical Engineering, Faculty of Health, Engineering and Engineering and Science at Victoria University. His research interest includes microprocessor-based system, instrumentation, data acquisition and interfacing, and microelectronics.     

Single DDCC Biquads with High Input Impedance and Minimum Number of Passive Elements

Two new configurations for the design of biquad filters with high input impedance are presented. The first configuration can synthesize low-pass and high-pass filter functions according to the passive components used. The second one can synthesize a band-pass filter function. The proposed configurations employ only one differential difference current conveyor (DDCC) as active elements and minimum number of passive elements, namely two resistors and two capacitors. Another filter topology based on DDCC is presented that allows modifying the quality factor without changing its natural frequency. All the filters enjoy low sensitivities. SPICE simulation results are given to confirm the validity of the analysis and to point out the high performance of the filters.Muhammed A. Ibrahim was born in Erbil, Iraq in 1969. He obtained his B.Sc. and M.Sc. degrees from Salahaddin University, Erbil, Iraq and Istanbul Technical University, Istanbul, Turkey in 1990 and 1999, respectively, all in electronics and communication engineering. Between 1992 and 1996 he worked as Research Assistant at Salahaddin University where he was later appointed as Assistant Lecturer in 1999. Since 2000 he has been studying for his Ph.D. degree in Electronics and Communication Engineering Program at Istanbul Technical University. His main research interests are CMOS circuit design, current-mode circuits and analog signal processing applications. He has more than 20 international journal and conference papers in scientific review.H. Hakan Kuntman received his B.Sc., M.Sc. and Ph.D. degrees from Istanbul Technical University in 1974, 1977 and 1982, respectively. In 1974 he joined the Electronics and Communication Engineering Department of Istanbul Technical University. Since 1993 he is a professor of electronics in the same department. His research interest include design of electronic circuits, modeling of electron devices and electronic systems, active filters, design of analog IC topologies. Dr. Kuntman has authored many publications on modelling and simulation of electron devices and electronic circuits for computer-aided design, analog VLSI design and active circuit design. He is the author or the coauthor of 76 journal papers published or accepted for publishing in international journals, 91 conference papers presented or accepted for presentation in international conferences, 99 turkish conference papers presented in national conferences and 10 books related to the above mentioned areas. Furthermore he advised and completed the work of 7 Ph.D. students and 31 M.Sc. students. Currently, he acts as the head of the Electronics and Communication Engineering Department in Istanbul Technical University. Dr. Kuntman is a member of the Chamber of Turkish Electrical Engineers (EMO).Oguzhan Cicekoglu received the B.Sc. and M.Sc. degrees from Bogazici University and the Ph.D. degree from Istanbul Technical University all in Electrical and Electronics Engineering in 1985, 1988 and 1996 respectively. He served as lecturer at the School of Advanced Vocational Studies Electronics Prog. of Bogazici University where he held various administrative positions between 1993 and 1999. He served also as part time lecturer at various institutions. He was with the Biomedical Engineering Institute of the Bogazici University between 1999 and 2001. He is currently Associate Professor at the Electrical and Electronics Engineering Department of the same University.His current research interests include analog circuits, active filters, analog signal processing applications and current-mode circuits. Oguzhan Cicekoglu is the author or co-author of 62 journal papers and about 90 international or local conference papers published or accepted for publishing in journals or conference proceedings.He served as the committee member in various scientific conferences and as reviewer in numerous journals including Analog Integrated Circuits and Signal Processing, IEEE CAS-I, IEEE CAS-II, International Journal of Electronics, Microelectronics Journal, Solid State Electronics and IEE Proceedings Pt.G.Oguzhan Cicekoglu is a member of the IEEE.