Ni/4H-SiC肖特基势垒二极管研制

采用微电子平面工艺,高真空电子束热蒸发金属Ni分别作肖特基接触和欧姆接触,二级场限环终端表面保护,研制出Ni/4H-SiC肖特基势垒二极管(SBD)。I-V特性测量说明,Ni/4H-SiCSBD有较好的整流特性,热电子发射是其主要的运输机理。反向击穿电压达1500V,理想因子为1.2,肖特基势垒高度为0.92eV。     

不同退火温度对4H SiC 金半接触的影响

采用高真空电子束蒸发法制作了基于4H SiC外延材料的肖特基二极管,其中欧姆接触材料为Ti/Ni,肖特基接触材料为Ni。常温下,电流-电压(I-V)测试表明Ni/4H SiC肖特基二极管具有良好的整流特性,热电子发射是其主要输运机理。对比分析不同快速退火温度下器件的I-V特性,实验结果表明875 ℃退火温度下欧姆接触特性最好,400 ℃退火温度下器件肖特基接触I-V特性最好,理想因子为1.447,肖特基势垒高度为1.029 eV。     

Mo/4H-SiC肖特基势垒二极管的研制

采用微电子平面工艺,射频溅射Mo作肖特基接触,电子束热蒸发金属Ni作欧姆接触,三级场限环终端表面保护.并通过对Mo接触进行合理的高温退火,不降低理想因子和反向耐压特性情况下,有效控制肖特基势垒高度在1.2～1.3 eV范围内,成功研制出高耐压低损耗Mo/4H-SiC肖特基势垒二极管.其特性测试结果为:击穿电压Vb为3000V,串联导通电阻Ron为9.2mΩ·cm2,Vb2/Ron为978MW/cm2.     

Mo/4H-SiC肖特基势垒二极管的研制

采用微电子平面工艺,射频溅射Mo作肖特基接触,电子束热蒸发金属Ni作欧姆接触,三级场限环终端表面保护.并通过对Mo接触进行合理的高温退火,不降低理想因子和反向耐压特性情况下,有效控制肖特基势垒高度在1.2～1.3 eV范围内,成功研制出高耐压低损耗Mo/4H-SiC肖特基势垒二极管.其特性测试结果为:击穿电压Vb为3000V,串联导通电阻Ron为9.2mΩ·cm2,Vb2/Ron为978MW/cm2.     

SiC肖特基紫外光电探测器的研制

采用微电子平面工艺,用宽禁带半导体n-4H-SiC和金属Au(或Ni)形成肖特基接触,Ti、Ni、Ag合金在背底作欧姆接触,制备出Au/n-4H-SiC和Ni/n-4H-SiC肖特基紫外光电探测器.测试分析了这两种器件的光谱响应特性及其I-V特性.其光谱响应范围均是200～400 nm,室温无偏压下,Au/n-4H-SiC的光谱响应峰值在310 nm,光谱响应半宽是73 nm,室温7 V偏压下光谱响应峰值86.72 mA/W,量子效率可达37.15%,Ni/n-4H-SiC相应的参数分别为300 nm、83 nm、45.84 mA/W及18.98%.Au/n-4H-SiC室温下正向开启电压0.81 V,Ni/n-4H-SiC是0.52 V,两者反向击穿电压均大于200 V,反向漏电流小于1×10-10 A.     

Ni肖特基接触厚度对Al0.3Ga0.7N/GaN应变异质结二维电子气密度的影响

厚度分别为50Å/50Å和600Å/2000Å的Ni/Au肖特基接触被沉积在Al0.3Ga0.7N/GaN应变异质结上。通过室温下测量的电容-电压曲线和电流-电压特性,我们计算得到厚度为600Å/2000Å的Ni/Au肖特基接触的二维电子气密度为9.131012 cm-2,而厚度为50Å/50Å 的Ni/Au肖特基接触的二维电子气密度为4.771012 cm-2。随着Ni/Au肖特基接触厚度由50Å/50Å增大到600Å/2000Å,正向20V时的饱和电流从60.88 mA增大到86.34 mA。通过薛定谔方程和泊松方程自洽计算,我们计算得到了两个样品的极化电荷密度,计算结果表明Ni/Au肖特基接触厚度厚的样品的极化较强。这样我们认为前面的实验结果是由于厚度为600Å/2000Å的肖特基接触增大了Al0.3Ga0.7N势垒层的张应力。     

基于双肖特基接触GaN薄膜特性参数测试新方法

提出了一种GaN薄膜电学参量测试新方法.该方法基于双肖特基结二极管结构,利用非对称的电极图形获取整流特性,从而省去了复杂的欧姆接触形成工艺,可方便地导出电子电导迁移率和肖特基接触理想因子等特征参数.对残留载流子浓度为7×1016 cm-3 的非故意掺杂GaN薄膜进行了试验,新方法得到Ni/Au-GaN肖特基接触的理想因子为2.8,GaN薄膜方块电阻为491Ω和电子电导迁移率为606cm2/(V·s).这些典型参数与利用欧姆接触实验和普通Ni/Au-GaN肖特基二极管测试所得结果较为吻合.该方法为半导体薄膜测试提供了新思路,可推广用于难以形成良好线性欧姆接触或材料特性受欧姆接触工艺影响较大的外延材料及其金半接触的监测研究.     

基于双肖特基接触GaN薄膜特性参数测试新方法

提出了一种GaN薄膜电学参量测试新方法.该方法基于双肖特基结二极管结构,利用非对称的电极图形获取整流特性,从而省去了复杂的欧姆接触形成工艺,可方便地导出电子电导迁移率和肖特基接触理想因子等特征参数.对残留载流子浓度为7×1016 cm-3 的非故意掺杂GaN薄膜进行了试验,新方法得到Ni/Au-GaN肖特基接触的理想因子为2.8,GaN薄膜方块电阻为491Ω和电子电导迁移率为606cm2/(V·s).这些典型参数与利用欧姆接触实验和普通Ni/Au-GaN肖特基二极管测试所得结果较为吻合.该方法为半导体薄膜测试提供了新思路,可推广用于难以形成良好线性欧姆接触或材料特性受欧姆接触工艺影响较大的外延材料及其金半接触的监测研究.     

Ni，Ti/4H-SiC肖特基势垒二极管

采用本实验室生长的4H-SiC外延片,分别用高真空电子束蒸Ni和Ti做肖特基接触金属,Ni合金作欧姆接触,SiO_2绝缘环隔离减小高压电场集边效应等技术,制作出4H-SiC肖特基势垒二极管(SBD)。该器件在室温下反向击穿电压大于600 V,对应的漏电流为2.00×10~(-6)A。对实验结果分析显示,采用Ni和Ti作肖特基势垒的器件的理想因子分别为1.18和1.52,肖特基势垒高度为1.54 eV和1.00 eV。实验表明,该器件具有较好的正向整流特性。     

超薄外延CoSi_2/n-Si的肖特基势垒接触特性

研究了超薄(～10nm)CoSi2/Si的肖特基势垒接触特性.Co(3—4nm)/Ti(1nm)双层金属通过快速热退火在Si(100)衬底上形成超薄CoSi2薄膜.X射线衍射测试表明该薄膜具有较好的外延特性.用I-V、C-V方法在82—332K温度范围内测试了CoSi2/Si的肖特基势垒特性.用弹道电子发射显微术直接测量了微区肖特基势垒高度.测试表明,用Co/Ti/Si方法形成的超薄CoSi2/Si接触在室温时具有优良的肖特基势垒特性,I-V方法测得的势垒高度为0.59eV,其理想因子为1.01;在低温时,I-V方法测得的势垒高度随温度降低而降低,理想因子则升高.采用肖特基势垒不均匀性理论,并假设势垒高度呈高斯     

4H-SiC结型势垒肖特基二极管的制作与特性研究

本文设计制作了两种具有不同结构参数的4H-SiC结型势垒肖特基二极管,在制作过程中采用了两种制作方法：一种是对正电极上的P型欧姆接触进行单独制作,然后制作肖特基接触的工艺过程;另一种是通用的通过一次肖特基接触制作就完成正电极制作的工艺过程。器件制作完成后,通过测试结果比较了采用场限环作为边界终端与未采用边界终端的器件的反向特性,结果显示采用场限环有效地提高了该器件的击穿电压,减小了其反向电流。另外,测试结果还显示采用独立制作P型欧姆接触的工艺过程有效提高了4H-SiC结型势垒肖特基二极管的反向特性,其中P型欧姆接触的制作过程和结果也在本文中做出了详细叙述。     

高性能SiC整流二极管研究

在n型4H-SiC单晶导电衬底上制备了具有MPS(merged p-i-n Schottky diode)结构和JTE(junction termination extension)结构的肖特基势垒二极管。通过高温离子注入及相应的退火工艺,进行了区域性p型掺杂,形成了高真空电子束蒸发Ni/Pt/Au复合金属制备肖特基接触,衬底溅射Ti W/Au并合金做欧姆接触,采用场板和JTE技术减小高压电场集边效应。该器件具有良好的正向整流特性和较高的反向击穿电压。反向击穿电压可以达到1300V,开启电压约为0.7V,理想因子为1.15,肖特基势垒高度为0.93eV,正向电压3.0V时,电流密度可以达到700A/cm2。     

采用场板和边缘终端技术的大电流Ni/4H-SiC SBDs

研究了4H-SiC低缺陷密度外延层的制造和Ni/SiC肖特基势垒二极管的正、反向电学特性。采用了偏8°4H-SiC衬底上台阶控制外延方法进行同质外延,外延温度1580℃,最后得到了低缺陷密度的3英寸外延片。采用了原子力显微镜和扫描电子显微镜进行了测试。在外延片上进行的Ni/4H-SiC肖特基势垒二极管的制造,采用了B+离子注入形成的一个非晶区域作为边缘终端,然后使用经过1000℃下退火10min的PECVD生长的SiO2作为场板介质。最终得到的Ni/4H-SiC肖特基势垒二极管的理想因子为1.03,势垒高度为1.6eV,在反向偏压1102V时,漏电流密度只有1.15×10-3A/cm2。在正向压降3.5V时得到了7.47A的大电流输出,特征导通电阻为6.22Ω.cm2。     

High performance of high-voltage 4H-SiC Schottky barrier diodes

High performance of high-voltage rectifiers could be realized utilizing 4H-SiC Schottky barrier diodes. A typical specific on-resistance (R_on) of these devices was 1.4×10³ Ω cm³ at 24°C (room temperature) with breakdown voltages as high as 800 V. These devices based on 4H-SiC had R _on's lower than 6H-SiC based high-power rectifiers with the same breakdown voltage. As for Schottky contact metals, Au, Ni, and Ti were employed in this study. The barrier heights of these metals for 4H-SiC were determined by the analysis of current-voltage characteristics, and the reduction of power loss could be achieved by controlling the barrier heights     

Fabrication and characteristics of a 4H-SiC junction barrier Schottky diode

4H-SiC junction barrier Schottky(JBS)diodes with four kinds of design have been fabricated and characterized using two different processes in which one is fabricated by making the P-type ohmic contact of the anode independently,and the other is processed by depositing a Schottky metal multi-layer on the whole anode.The reverse performances are compared to find the influences of these factors.The results show that JBS diodes with field guard rings have a lower reverse current density and a higher breakdown voltage,and with independent P-type ohmic contact manufacturing,the reverse performance of 4H-SiC JBS diodes can be improved effectively. Furthermore,the P-type ohmic contact is studied in this work.     

Silicon carbide pinch rectifiers using a dual-metal Ti-Ni/sub 2/Si Schottky barrier

The electrical characterization of dual-metal-planar Schottky diodes on silicon carbide is reported. The devices were fabricated on both 6H- and 4H-SiC by using titanium (Ti) and nickel silicide (Ni/sub 2/Si) as Schottky metals. These rectifiers yielded the same forward voltage drop as the Ti diodes and leakage current densities comparable to those of the Ni/sub 2/Si diodes. The reduction of the reverse leakage current density, with respect to that of the Ti diodes, was about three orders of magnitude in 6H and about a factor of 30 in 4H-SiC. All that results in a consistent reduction of the device power dissipation. Electrical characterization of the devices at different temperatures provided insight into the carrier transport mechanism. In particular, the electrical behavior of the system was explained by an "inhomogeneous" Schottky barrier model, in which the low Ti barrier determines the current flow under forward bias, whereas the high Ni/sub 2/Si barrier dominates the reverse bias conduction by the pinchoff of the low barrier Ti regions.     

Effect of reactive ion etch-induced damage on the performance of 4H-SiC schottky barrier diodes

The effect of reactive ion etch (RIE) induced damage on 4H-SiC surfaces etched in fluorinated plamas has been investigated and characterized using Ni Schottky diodes and x-ray photoelectron spectroscopic surface analysis. The diodes were characterized using current-voltage, current-voltage-temperature, and capacitance-voltage measurements with near ideal forward characteristics (n=1.07) and forward current density as high as 9000 A/cm² from the control (unetched) devices. High current handling capability was observed in diodes with etched surfaces as well. Diodes with surfaces etched in CHF₃ containing plasmas showed a significant reduction in the barrier height compared to the diodes with surfaces etched in CF₄ containing plasma. Control devices exhibited high leakages when reverse biased, which is attributed to the presence of a thin (∼2 nm) oxide layer at the metal-semiconductor interface. However, under reverse bias diodes with CHF₃-etched surfaces showed improvement in leakage current compared to diodes with CF₄-etched surfaces and the control diodes.     

4H-SiC混合PN/Schottky二极管的研制

报道了4H-SiC混合PN/Schottky二极管的设计、制备和特性．该器件用镍作为肖特基接触金属,使用了结终端扩展（JTE）技术．在肖特基接触下的n型漂移区采用多能量注入的方法形成P区而组成面对面的PN结,这些PN结将肖特基接触屏蔽在高场之外,离子注入的退化是在1500℃下进行了30min．器件可耐压600V,在600V时的最小反向漏电流为1×10-3A/cm2．1000μm的大器件在正向电压为3V时电流密度为200A/cm2,而300μm的小尺寸器件在正向电压为3.5V电流密度可达1000A/cm2．