微波BJT超宽带低噪声放大器的设计

本文给出了一种频带覆盖达１０－１６００ＭＨｚ的微波ＢＪＴ超宽带低噪声放大器的设计方法，从微波ＢＪＴ的噪声模型出发，通过拟合５０Ω源阻抗下微波ＢＪＴ的噪声系数ＮＦ５０和Ｓ参数来提取其噪声参数，然后根据增益，噪声及驻波比要求优化设计放大器，使放大器在超宽带范围内获得平坦增益和低噪声，本文所给出的微波ＢＪＴ惨数提取及放大器优化设计方法已由实验结果所验证。     

L波段砷化镓单片低噪声放大器

设计、研制了一种工作在Ｌ波段的ＧａＡｓ单片低噪声放大器。该放大器在ＨＰ－８５１０Ｂ网络分析仪和ＨＰ－８９７０Ｂ自动噪声仪上的测试结果为：１．１～１．５ＧＨＺ频段，ＮＦ≤２．０ｄＢ，Ｇ≥１８ｄＢ，ＶＳＷＲ（ｉｎ，ｏｕｔ）≤２：１，增益起伏≤０．５ｄＢ；在１．５～２．０ＧＨＺ频段ＮＦ≤２．５ｄＢ，Ｇ≥１８ｄＢ，ＶＳＷＲ（ｉｎ，ｏｕｔ）≤２：１，增益起伏≤±０．５ｄＢ。     

6～20GHz宽带低噪声中功率放大器

本文介绍了６～２０ＧＨｚ微波宽带低噪声、中功率放大器的研制工作。采用微波宽带匹配和ＣＡＤ技术, 研制出了符合整机要求的放大器。主要性能指标： 工作频率６～２０ＧＨｚ, １ｄＢ压缩输出功率≥１８ｄＢｍ , 增益≥２８ｄＢ, 输入输出驻波比≤２．０∶１, 噪声系数≤４．０ｄＢ, 增益平坦度≤±２．０ｄＢ     

6～20GHz宽带低噪声中功率放大器

本文介绍了６￣２０ＧＨｚ微波宽带低噪声,中功率放大器的研制工作。采用微波宽带匹配和ＣＡＤ技术,研制出了符合整机要求的放大器。主要性能指标：工作频率６￣２０ＧＨｚ,１ｄＢ压缩输出功率≥１８ｄＢｍ,增益≥２８ｄＢ,输入输出驻波比≤２．０：１,噪声系数≤４．０ｄＢ,增益平坦度≤±２．０ｄＢ。     

DC～1．5GHz GaAs单片集成跨阻放大器

介绍一种采用８个砷化镓ＦＥＴ和７个二极管的单片集成跨阻放大器，其结果良好，频率为ＤＣ～１．５ＧＨｚ，增益Ｇａ≥１８ｄＢ，噪声系数Ｆｎ≤４．３ｄＢ（ｆ＝４００ＭＨｚ，Ｒｓ＝Ｒ＿Ｌ＝５０Ω）。     

SFM001宽带放大器

ＳＦＭ００１宽带放大器是由信息产业部电子第二十四研究所正向设计的电路。该电路具有噪声小、功耗低、动态范围大、增益高及增益;控制能力强等特点。它作为中频宽带放大器,可广泛用于雷达、通讯、仪器仪表等设备上。 主要技术指标：电源电流 ＩＣＣ：≤２２ ｍＡ,中心频率：１７．８～１８． ２ ＭＨｚ,３ ｄＢ带宽 ＢＷ：５～６ ＭＨＺ,增益 ≥７５ ｄＢ,ＡＧＣ控制范围,噪声系数 ＮＦ：≤２ ｄＢ,限幅输出,受控 ３ ｄＢ带宽 ＢＷ（３ ｄＢ）：≥４ ＭＨｚ。 该电路具有噪声小、功耗低、动态范围大,增益高及增益能力强等特点。…     

2～18GHz GaAs单片超宽带放大器

介绍了２￣１８ＧＨｚ ＧａＡｓ微波低噪声宽带单片放大器设计原理及主要研究工作，给出了主要研究结果：在２￣１８ＧＨｚ频率范围内，管壳封装的两级级联放大器的增益Ｇ＝１３．５￣１８．３ｄＢ，噪声系数Ｆｎ＝４．２￣６．２ｄＢ，输入电压驻波比ＶＳＷＲｉｎ〈２．０，输出电压驻波比ＶＳＷＲｏｕｔ〈２．５。     

高频低噪声放大器

ＧＨＡ２０６９是ＵｎｉｔｅｄＭｏｎｏｌｉｔｈｉｃＳｅｍｉｃｏｎｄｕｃｔｏｒｓ研制的高频低噪声放大器,它的工作频带宽,从１８ＧＨｚ到３１ＧＨｚ,采用自偏压３级放大。增益为２２ｄＢ,增益平坦度为±１ｄＢ,噪声为２５ｄＢ,三阶截断点的输出功率为２０ｄＢｍ,直流工作电流为５５ｍＡ,功耗低。高频低噪声放大器     

2～12GHz GaAs单片行波放大器

报道了一个全平面超宽带ＧａＡｓ单片行波放大器的研究结果。该单片电路的核心部件是四个３００μｍ栅宽的ＭＥＳＦＥＴ，整个电路拓扑结构简单，芯片面积为３．０ｍｍ×１．８ｍｍ。电路经优化设计后在２～１２ＧＨｚ范围内，小信号增益为５±１ｄＢ，输入输出电压驻波比≤１．７５。上述频率范围内输出功率≥１６ｄＢｍ，噪声系数≤８ｄＢ。采用全离子注入、全平面工艺，均匀性、一致性良好。实验结果与设计预计值十分一致。     

2～18GHz超宽带射频放大器

采用分布电路原理、ＣＡＤ技术和微带电路技术，制作出多倍频程超宽带放大器。其主要技术参数为，ｆ＝２～１８ＧＨｚ，Ｇ＿ｐ≥３０ｄＢ，△Ｇ＿ｐ≤±３ｄＢ，Ｆ＿ｎ≤７ｄＢｍ，Ｐ＿（－１）≥＋１０ｄＢ，ＶＳＷＲ≤２．５：１。     

毫米波大动态宽带单片低噪声放大器

利用0.25μmGaAsPHEMT低噪声工艺,设计并制造了2种毫米波大动态宽带单片低噪声放大器。第1种为低增益大动态低噪声放大器,单电源+5V工作,测得在26～40GHz范围内,增益G=10±0.5dB,噪声系数NF≤2.2dB,1分贝压缩点输出功率P1dB≥15dBm;第2种为低压大动态低噪声放大器,工作电压为3.6V,静态电流0.6A(输出功率饱和时,动态直流电流约为0.9A),在28～35GHz范围内,测得增益G=14～17dB,噪声系数约4.0dB,1分贝压缩点输出功率P1dB≥24.5dBm,最大饱和输出功率≥26.8dBm,附加效率约10%～13.6%。结果中还给出了2种放大器直接级联的情况。     

Noise-canceling and IP3 improved CMOS RF front-end for DRM/DAB/DVB-H applications

A CMOS RF (radio frequency) front-end for digital radio broadcasting applications is presented that contains a wideband LNA, I/Q-mixers and VGAs, supporting other various wireless communication standards in the ultra-wide frequency band from 200 kHz to 2 GHz as well. Improvement of the NF (noise figure) and IP3 (third-order intermodulation distortion) is attained without significant degradation of other performances like voltage gain and power consumption. The NF is minimized by noise-canceling technology, and the IP3 is improved by using differential multiple gate transistors (DMGTR). The dB-in-linear VGA (variable gain amplifier) exploits a single PMOS to achieve exponential gain control. The circuit is fabricated in 0.18-μm CMOS technology. The S_(11) of the RF front-end is lower than -11.4 dB over the whole band of 200 kHz-2 GHz. The variable gain range is 12-42 dB at 0.25 GHz and 4-36 dB at 2 GHz. The DSB NF at maximum gain is 3.1-6.1 dB. The IIP3 at middle gain is -4.7 to 0.2 dBm. It consumes a DC power of only 36 mW at 1.8 V supply.     

宽带CMOS低噪声放大器的设计

文章主要介绍应用于集群接收机系统的350MHz～470MHz低噪声放大器,采用0.6μm CMOS工艺。探讨了优化低噪声放大器的噪声系数、增益与线性度的设计方法,同时对宽带输入输出匹配进行了分析。这种宽带低噪声放大器的工作带宽350MHz～470MHz,噪声系数小于3dB,增益为24dB,增益平坦度为±1dB,输入1dB压缩点大于-15dBm。     

Negative-resistance amplifiers using three-terminal Gunn devices

Negative-resistance amplifiers have been realised using three-terminal Gunn devices. Both transmission and reflection amplifiers were made, with the central frequency in the range 100?540 MHz for the transmission type and in the range 390?425 MHz for the reflection type. The maximum gain obtained reached about 53dB with a noise figure of about 20dB for a transmission-type amplifier operated at 140 MHz.     

0.13微米CMOS双通道超宽带低噪声放大器设计

本文设计了一款超宽带低噪声放大器,并对设计流程进行分析仿真.该低噪放采用双通道结构,有效的输入阻抗匹配、平稳的增益和低噪声等性能可以同时实现.应用ADS工具TSMC 0.13μm CMOS工艺库的仿真结果表明,其最大功率增益为14.2dB,在8GHz频点的IIP3为-4dBm,输入、输出反射系数分别小于-10.2dB和-10.89dB,噪声指数单调下降到1.46dB,并且总功耗和带内最大增益摆幅较低.     

A 0.18μm CMOS low noise amplifier using a current reuse technique for 3.1-10.6 GHz UWB receivers

A new,low complexity,ultra-wideband 3.1-10.6 GHz low noise amplifier(LNA),designed in a chartered 0.18μm RFCMOS technology,is presented.The ultra-wideband LNA consists of only two simple amplifiers with an inter-stage inductor connected.The first stage utilizing a resistive current reuse and dual inductive degeneration technique is used to attain a wideband input matching and low noise figure.A common source amplifier with an inductive peaking technique as the second stage achieves high flat gain and wide -3 dB bandwidth of the overall amplifier simultaneously.The implemented ultra-wideband LNA presents a maximum power gain of 15.6 dB,and a high reverse isolation of—45 dB,and good input/output return losses are better than -10 dB in the frequency range of 3.1-10.6 GHz.An excellent noise figure(NF) of 2.8-4.7 dB was obtained in the required band with a power dissipation of 14.1 mW under a supply voltage of 1.5 V.An input-referred third-order intercept point(IIP3) is -7.1 dBm at 6 GHz.The chip area,including testing pads,is only 0.8×0.9 mm2.     

A 400 MHz Low Noise Amplifier at Cryogenic Temperature for Superconductor Filter System

A cryogenic low noise amplifier （LNA） using Agilent high electron mobility transistor （HEMT） for 380 MHzto 480 MHz is designed and fabricated, and the excellent cryogenic performance in superconducting receiver front-end for communication system is achieved. A special input impedance matching topology is implemented to provide low noise figure （NF） and good input matching in this cryogenic LNA design. The measurement results show that the NF is within 0.25 dB from the minimum NF of a single transistor, the power gain is above 20 dB, the flatness is within 1 dB, and the maximum input return loss is lower than -20 dB in bandwidth.     

A sub-1-dB NF±2.3-kV ESD-protected 900-MHz CMOS LNA

A sub-1-dB noise figure HBM ESD-protected [-3 kV, 2.3 kV] low noise amplifier (LNA) has been integrated in a 0.35-μm RF CMOS process with on-chip inductors. The sensitivity of the LNA performances to the spread of parasitics associated with package and bondwire has been attenuated by using an inductive on-chip source degeneration. At 920 MHz and P_dc=8.6 mW, the LNA features: noise figure NF=1 dB, input return loss=-8.5 dB, output return loss=-27 dB, power gain G _p=13 dB, input IIP3=-1.5 dBm. At a power dissipation of 5 mW and 17.6 mW, a NF respectively equal to 1.2 dB and 0.85 dB is measured. The CMOS LNA takes 12 pins of a TQFP48 package, an area of 1.0×0.66 mm² (bondwire pads excluded) and it is the first HBM ESD-protected [-3 kV, 2.3 kV] CMOS LNA to break the 1-dB NF barrier     

Hybrid fiber amplifiers consisting of cascaded TDFA and EDFA for WDM signals

The detailed gain characteristics of hybrid fiber amplifiers that consist of cascaded thulium-doped fiber amplifiers (TDFAs) and erbium-doped fiber amplifiers (EDFAs) are reported. The experimental results showed that the hybrid amplifiers have gains of over 20 dB with the bandwidth of more than 80 nm in the wavelength range between 1460 and 1560 nm. The low noise figure (NF) below 7 dB was obtained in 1460-1540 nm when placing a TDFA in the first stage followed by an EDFA and in 1480-1560 nm when placing amplifiers in a reversed order. The gain of TDFA and EDFA was optimized for minimizing the gain variation ratio (GVR=(maximumgain-minimumgain)/minimumgain: in the unit of decibels) of the hybrid amplifiers, and it could be minimized to less than 0.4 for the amplifiers that have gain in the wavelength region from 1460 to 1537 nm. The gain-equalization technique was applied, and the hybrid amplifier that had an average gain of 20 dB, a gain excursion of less than 2 dB, an output power of 14.5 dBm, and an NF of less than 7 dB in the 77-nm gain band was achieved.