基于高次谐波体声波谐振器的微波振荡器设计

基于高次谐波体声波谐振器(HBAR)的高品质因数(Q)值和多模谐振特性,设计了Colpitts和Pierce两种形式的微波振荡器。采用HBAR与LC元件组成谐振回路的方法,与放大电路构成反馈环路直接基频输出微波频段信号。Colpitts振荡器输出信号频率为980 MHz,信号输出功率为-4.92dBm,信号相位噪声达-119.64dBc/Hz@10kHz;Pierce振荡电路输出信号频率达到2.962GHz,信号输出功率为-9.77dBm,信号相位噪声达-112.30dBc/Hz@10kHz。     

X波段介质谐振器振荡器和缓冲放大器的研究

微波振荡器代表所有基本微波通信系统的能源来源。研究设计8．95GHz的低噪声砷化镓场效应管并联反馈介质谐振器振荡器,为了放大输出功率和提高负载牵引,在介质谐振器振荡器后一级加缓冲放大器,最终的输出功率是＋13．33dBm。测试证明输出信号的相位噪声偏离中心频率100kHz可达-116．49dBc／Hz,偏离中心频率10kHz可达-91．74dBc／Hz。     

A Technique for the Design of Microwave Transistor Oscillators (Short Paper)

A technique for the design of microwave transistor oscillators is presented in which measurements made on an experimentally optimized amplifier are used to calculate six basis oscillator circuits which yield maximum power output. The procedure has been experimentally verified by the construction of a silicon bipolar transistor test oscillator at 1 GHz.     

Design and Analysis of a 90 nm mm-Wave Oscillator Using Inductive-Division LC Tank

A 60 GHz voltage-controlled oscillator with an inductive division LC tank has been designed in 90 nm CMOS. The analysis of the oscillator shows that the presence of higher harmonics, the capacitance nonlinearity and the very high $K _{rm VCO}$ are critical for the phase noise performance of oscillators. Therefore, a pseudo-differential amplifier is employed in this design because of its high linearity. Furthermore, the proposed inductive division reduces the phase noise by increasing the signal amplitude across the varactor, without affecting the operation mode of the cross-coupled pair transistors. It also helps to increase the tuning range by isolating the varactor from the parasitic capacitances of the transistors and interconnects. The mm-wave oscillator is fabricated in a 90 nm CMOS technology. Under 0.7 V supply, the oscillator achieves a tuning range from 53.2 GHz to 58.4 GHz, consuming 8.1 mW. At 58.4 GHz, the phase noise is $-hbox{91~dBc}/hbox{Hz}$ at 1 MHz offset. Under 0.43 V supply, the oscillator achieves a tuning range from 58.8 to 61.7 GHz. At 61.7 GHz, the phase noise is $-hbox{90~dBc}/hbox{Hz}$ @1$~$MHz offset with a power consumption of only 1.2 mW.      

Accurate RF large-signal model of LDMOSFETs including self-heatingeffect

In this paper, we present a new silicon RF LDMOSFET large-signal model including a self-heating effect. A new empirical channel current model suited for accurately predicting intermodulation distortion is employed. The proposed channel current model can represent transconductance (gm) saturation and rolloff in the continuous manner. It has continuous higher order derivatives for accurate prediction of nonlinear microwave circuit behavior, such as power amplifiers, microwave mixers, oscillators, etc. Using the complete large-signal model, we have designed and implemented a 1.2 GHz power amplifier. The measured and simulated amplifier characteristics, especially the intermodulation and harmonic behaviors, are in good agreement     

A New Microwave Amplifier for Multichannel FM Signals Using a Synchronized Oscillator

Because of the excellent results of the noise-loading test on an IMPATT oscillator that is phase-locked to an external FM driving signal, a new microwave amplifier for multichannel FM signals using a synchronized oscillator is proposed. An IMPATT oscillator, injection-synchronized with an FM signal, is regarded as an amplifier and its noise characteristics for multichannel signals are evaluated with the noise-loading method as recommended by the International Radio Consultative Committee. The results show that when this oscillator satisfies the noise characteristics for 960 telephone message channels, it assures a gain of approximately 15 dB at 11 GHz, and in this sense, this oscillator can be regarded as an amplifier for multimessage channels. The degradation of SNR of this amplifier is less than 2 dB. This excellent result is obtained because of the following. In the video band, the modulation suppression of an FM driving signal in the injection-synchronized oscillator, such as the IMPATT, is very small, while the oscillator noise, which dominates the entire output characteristic, is considerably reduced by the synchronizing action of the oscillator. This amplification continues up to the high-frequency range in which this principle of operation applies.     

A field programmable analog array for CMOS continuous-time OTA-Cfilter applications

A programmable high-frequency operational transconductance amplifier (OTA) is proposed and analyzed. A general configurable analog block (CAB) is presented, which consists of the proposed programmable OTA, programmable capacitor and MOSFET switches. Using the CABs, the universal tunable and field programmable analog array (FPAA) can be constructed, which can realize many signal-processing functions, including filters. A tuning circuit is also discussed. The proposed OTA has been simulated and fabricated in CMOS technology. The results show that the OTA has the transconductance tunable/programmable in a wide range of 700 times and the -3-dB bandwidth larger than 20 MHz. A universal 5×8 CAB array has been fabricated. The chip has also been configured to realize OTA-C 60-kHz and 500-kHz bandpass filters based on ladder simulation and biquad cascade     

Design considerations for CMOS and GaAs OTAs: Frequency response,linearity, tuning,and common-mode feedback

High-performance operational transconductance amplifiers (OTAs) are important in the design of high-frequency analog transconductance-C (g _m -C) filters. Critical design considerations for OTAs are frequency response, linearity, tuning, output impedance, power supply rejection (PSR), and common-mode rejection (CMR). In CMOS technology, satisfactory OTA design techniques are available, except that the linear input range often is relatively small and the frequency response of the OTA is limited by the intrinsic speed of transistors. In this paper, a new approach is developed to increase the linear input range, and a trade-off between linearity and input range is discussed. A CMOS OTA with less than ±0.4% linearity error over a very large input range is given as a design example. To achieve a very high frequency response, 1m depletion-mode GaAs MESFETs with high intrinsic speed are used to replace MOSFETs. Simple ac compensation, a new technique for output impedance enhancement, and a new tuning method for OTAs with all N-channel devices are used to design a GaAs OTA with very small parasitics and f _–3dB=7 GHz. To improve PSR and CMR, fully balanced structures are used for the OTAs. Design considerations for the interaction of the operation of common-mode feedback (CMF) and tuning are discussed, and improved CMF circuits are proposed. Using the GaAs OTA and considering the frequency limitations imposed by parasitics, the design of a high order ladder filter with 300MHz cutoff frequency is presented as an application.     

A CMOS 140-mW fourth-order continuous-time low-pass filter stabilized with a class AB common-mode feedback operating at 550 MHz

A 550-MHz linear-phase low-pass continuous-time filter is described. The operational transconductance amplifier (OTA) is based on complementary differential pairs in order to achieve high-frequency operation. A common-mode feedback (CMFB) based on a Class AB amplifier with improved stability at high frequencies is introduced. Results for the stand alone OTA show a unity gain frequency of 1 GHz while the excess phase is less than 5/spl deg/. The filter is based on G/sub m/-C biquads and achieves IM3 <-40 dB for a two-tone input signal of -10 dBm each. The power consumption of the fourth-order filter is 140 mW from supply voltages of /spl plusmn/1.65 V. The chip was fabricated in a standard 0.35-/spl mu/m CMOS technology.     

A 67-GHz low-phase-noise oscillator and its application in a polar transmitter

In this paper, a low-phase-noise 67-GHz CMOS oscillator is presented. This inductorless voltage-controlled oscillator (VCO) employs a combination of standing-wave and travelling-wave oscillators to generate multi-phase outputs. A filtering technique is used to reduce the phase noise of the VCO. The oscillator achieves a tuning range of 5.2 GHz using a combination of coarse and fine tuning methods. The proposed multi-phase oscillator is designed and fabricated in a 0.13-μm CMOS process. Operating at 67 GHz, the VCO consumes 14 mW from a 1.2-V supply and achieves an output phase noise of −95.66 dBc/Hz (−107.89 dBc/Hz) at a 1 MHz (10 MHz) offset. The chip area is 0.9 mm². As an application example for the presented multi-phase oscillator, a polar transmitter structure is proposed. The transmitter is designed for systems that use a circular quadrature-amplitude modulation (QAM) constellation. A specific example of a 16-QAM transmitter is presented. The desired output phase is chosen by an 8-to-1 multiplexer, and a variable gain amplifier (VGA) is used to achieve the desired amplitude. Based on post-layout simulations, the 60-GHz 16-QAM transmitter consumes 43.2 mW from a 1.2-V supply.     

A 2.4 GHz high-performance CMOS differential quadrature relaxation oscillator

In this paper, the effects that limit the performance of practical implementations of RC relaxation oscillators are investigated. The insights gained are used to suggest a topology for high-frequency quadrature relaxation oscillators with closer-to-optimal performance. The proposed oscillator uses a modified latch to improve the switching speed without increasing the power consumption. Moreover, the new topology avoids static current sources, maximizes the voltage swing and has an active coupling structure without static power consumption that reduces the circuit phase-noise. Experimental results show that the oscillator operates in relaxation mode at 2.4 GHz and achieves a FoM of \(\mathrm {-162\,dBc/Hz}\), which is, as far as the authors know, the best FoM for relaxation oscillators operating in the GHz range.     

An Amplitude-Balanced Current-Reused CMOS VCO Using Spontaneous Transconductance Match Technique

A 3.5 GHz, 0.18 $mu{rm m}$ CMOS current-reused voltage-controlled oscillator (VCO) with very high amplitude balance is presented. While the current-reused VCO can dramatically save dc power consumption, it has the drawback of output amplitude imbalance resulting from the asymmetric circuit structure. A spontaneous transconductance match (STM) technique is proposed to balance the transconductance of nMOS and pMOS transistors by the imbalance-induced voltage at the center-tapped point of the tank inductor. This transconductance match takes place spontaneously with the occurrence of signal imbalance such that imbalances can be instantly eliminated. The measured amplitude imbalance ratio is less than 0.7% over the entire tuning range of 2.93 to 3.62 GHz, significantly reduced from 3% of the VCO without STM. The power consumption is as low as 1.65 mW from a 1.5 V supply. The phase noise is $-$ 122 dBc/Hz at 1 MHz offset. A very high FOM of $-$195.7 dBc/Hz is achieved.      

A CMOS transconductance amplifier architecture with wide tuningrange for very low frequency applications

A pseudodifferential CMOS operational transconductance amplifier (OTA) with wide tuning range and large input voltage swing has been designed for very small G_M's (of the order of a few nanoamperes per volt). The OTA is based on a modified four-quadrant multiplier architecture with current division. A common-mode feedback circuit structure has been proposed and designed using floating-gate transistors to handle large differential signals. Large on-chip capacitors are emulated through impedance scaling circuits. The circuits, fabricated in a 1.2-μm CMOS process, have been used to design a fourth-order bandpass filter and a relaxation oscillator. Experimental results are in good agreement with the theoretical results     

A temperature stabilized CMOS VCO

The established method of frequency drift compensation in voltage controlled oscillators (VCOs) resulting from temperature variance involves modulation of control voltage using a non-linear voltage internally generated. An innovative frequency drift compensation scheme for a VCO, based on amplitude control, is described in this paper. Two peak detectors are used to generate voltages representing positive and negative peaks of the sinusoidal driving an error amplifier. The amplifier output controls the delivery of transconductance accessible to the oscillator, thereby keeping the oscillation amplitude steady. Frequency stability has improved to 16 ppm/°C from an uncompensated value of 189 ppm/°C and is applicable where frequency stability requirements are not stringent, such as HS-USB and S-ATA. The temperature stabilized VCO at 2.4 GHz center frequency is prototyped using CMOS technology from ams AG (formerly austriamicrosystems AG). The result obtained from this study indicates that better frequency stability may be achievable if the traditional compensation scheme is preceded by amplitude control.     

A 1.5-V 0.7–2.5-GHz CMOS Quadrature Demodulator for Multiband Direct-Conversion Receivers

An integrated quadrature demodulator with an on-chip frequency divider is reported. The mixer consists of a transconductance stage, a passive current switching stage, and an operational amplifier output stage. A complementary input architecture has been used to increase the transconductance for a given bias current. The circuit is inductorless and is capable of operating over a broad frequency range. The chip was implemented in a 0.13-mum CMOS technology. From 700 MHz to 2.5 GHz, the demodulator achieves 35 dB of conversion voltage gain with 250-kHz IF bandwidth, a double-sideband NF of 10 dB with 9-33 kHz 1/f-noise corner. The measured IIP3 is 4 dBm for a 0.1-MHz IF frequency and 10 dBm for a 1-MHz IF frequency. The total chip draws 20 to 24 mA from a single 1.5-V supply.     

CMOS Oscillators for Clock Distribution and Injection-Locked Deskew

The distribution and alignment of high-frequency clocks across a wide bus of links is a significant challenge in modern computing systems. A low power clock source is demonstrated by incorporating a buffer into a cross-coupled oscillator. Because the load is isolated from the tank, the oscillator can directly drive 50-Ohm impedances or large capacitive loads with no additional buffering. Using this topology, a quadrature VCO (QVCO) is implemented in 0.13 $mu hbox{m}$ digital CMOS. The QVCO oscillates at 20 GHz, consumes 20 mW and provides 12% tuning range. The measured phase noise is $-101~hbox{dBc}/hbox{Hz}$ @ 1 MHz frequency offset. A clock alignment technique based upon injection-locked quadrature-LC or ring oscillators is then proposed. Although injection-locked oscillators (ILOs) are known to be capable of deskewing and jitter filtering clocks, a study of both LC and ring ILOs indicates significant variation in their jitter tracking bandwidth when used to provide large phase shifts. By selectively injecting different phases of a quadrature-LC or ring VCO, this problem is obviated resulting in reduced phase noise. The technique is demonstrated using a LC QVCO at 20 GHz while burning only 20 mW of power and providing an 8 dB improvement in phase noise. A ring oscillator deskews a 2 to 7 $~$GHz clock while consuming 14 mW in 90 nm CMOS.      

密勒运算跨导放大器的单粒子瞬变效应分析

从2阶闭环系统的角度出发,推导并分析了单粒子瞬变(SET)电流在密勒运算跨导放大器(OTA)中的传导效应。通过理论分析,发现OTA两级跨导比例(Gm2/Gm1)的大小不仅决定了系统闭环的稳定性,也决定了SET电流在系统输出端电压响应的振动幅度和恢复时间。在标准0.18μm CMOS工艺下,通过改变两级跨导的比例值,对电路的两个有效节点进行电路级SET轰击实验,收集实验结果,给出抗SET效应运算放大器的设计建议。     

一种新型微波开关的设计与实现

本文研究了一种新型的微波开关.利用震荡电路产生频率为50Hz(占空比为1%)的低频信号,低频信号通过施密特触发器得到10GHz的高频信号,然后通过高频振荡器发射微波束.利用波束障碍原理,当接收振荡器接收到的微波束经过滤波、放大、解调后,控制芯片(MSP430F149)对得到的幅值、低频频率、高频频率等参数进行判断,从而...     

A High-Power $Ka$-Band (31–36 GHz) Solid-State Amplifier Based on Low-Loss Corporate Waveguide Combining

A method of using low-loss waveguide septum combiners is developed into a high-power $Ka$-band (31–36 GHz) amplifier producing $>$50 W at 33 GHz ($Ka$-band) using 32 low-power ($≪$2 W) solid-state amplifier modules. By using low-loss waveguide combining and a packaged monolithic microwave integrated circuit with a low-loss microstrip-to-waveguide launcher, the output loss is minimized, allowing for the overall power-combining efficiency to remain high, $>$80% (average insertion loss of combiner $≪$ 0.7 dB and average insertion loss of launcher $≪$0.3 dB) over 31–36 GHz. In the past, lower power-combining efficiencies have limited the number of modules that can be combined at $Ka$ -band, and hence, have limited the power output. The approach demonstrated in this paper, with high power-combining efficiency, allows a very large number (32) of solid-state amplifier modules to be combined to produce high powers. Greater than 50 W was demonstrated with low power modules, but even higher powers $>$120 W are possible. The current approach is based on corporate combining, using low-loss waveguide septum combiners that provide isolation, maintaining the true graceful degradation of a modular solid-state amplifier system.      

Linear microwave amplification with Gunn oscillators

Linear microwave amplifiers with continuous power outputs of 100 mW have been constructed utilizing the frequency-independent negative conductance observed externally in Gunn oscillators. This negative conductance is exhibited only in samples containing propagating dipole layers, in other words,n_{0} . Lmust be larger than 10¹²cm^-2for n-GaAs. The output power obtainable from this amplifier is substantially larger than that from a subcritically doped GaAs amplifier (n_{0} . L < 10^{12}cm^-2) becausen_{0} . Lcan be increased. Power output and efficiency are discussed in terms of n0andL. The upper-frequency limit for amplification is determined by the time the domain takes to readjust itself after a change of external voltage which leads to an upper limit for thef. Lproduct (about 10⁸cm/s). The essential feature of the amplifier circuit is to provide both a short circuit at the Gunn oscillation frequency and a broadband circuit at the signal frequency. An average gain of 3 dB was exhibited from 5.5 GHz to 6.5 GHz. Gain compression of 1 dB occurred at 60 mW output power with 9 dB gain, while the noise figure was about 19 dB.