GaAs/Si/AlAs异质结的带阶和GaAs生长温度的影响

用分子束外延 (MBE)设备制备了 Ga As/ Al As和 Ga As/ Si/ Al As异质结 ,通过 XPS分别研究了异质结界面处 Si层厚度为 0 .5 ML 和 1ML 对异质结带阶的调节 ,得到最大调节量为 0 .2 e V;通过 C- V法研究了异质结的Ga As层在不同温度下生长对 0 .5 ML Si夹层的影响 ,得到 Si夹层的空间分布随 Ga As层生长温度的升高而扩散增强的温度效应 ,通过深能级瞬态谱 (DL TS)研究了在上述不同温度下生长的 Ga As层的晶体质量 .     

In0.5Ga0.5As/In0.5Al0.5As应变耦合量子点的形貌和光学性质

提出了利用分子束外延方法生长In0.5Ga0.5As/In0.5Al0.5As应变耦合量子点，并分析量子点的形貌和光学性质随GaAs隔离层厚度变化的特点。实验结果表明，随着耦合量子点中的GaAs隔离层厚度从2 nm增加到10 nm，In0.5Ga0.5As量子点的密度增大、均匀性提高, Al原子扩散和浸润层对量子点PL谱的影响被消除，而且InAlAs材料的宽禁带特征使其成为InGaAs量子点红外探测器中的暗电流阻挡层。由此可见，选择合适的GaAs隔离层厚度形成InGaAs/InAlAs应变耦合量子点将有益于InGaAs量子点红外探测器的研究。     

有机金属气相外延GaAs的载流子浓度与外延气氛中As/Ga值的关系

OMV法非有意掺杂外延GaAs的载流子浓度受外延气氛中As/Ga值的控制。本研究中发现: As/Ga值等于十四左右, N型外延GaAs的迁移率有一个最大值,相应的载流子浓度较低。掺硫N型外延GaAs的载流子浓度随As/Ga值的增加而下降。 本文分析了OMV法的外延机构,提出了质量输运控制下的界面反应区部分反应热力学平衡模型,从而导出了Ⅵ族、Ⅱ族以及Ⅳ族元素的掺杂关系式。应用这些关系式能满意地解释OMV法外延GaAs的载流子浓度与As/Ga值的关系,并能说明其他工艺条件(外延温度、生长速率、掺杂量等)对外延GaAs载流子浓度的影响。 研究结果已经应用于GaAs FET材料的制备工艺,因而掺S外延GaAs的载流子浓度得到了有效的控制。     

离子损伤对等离子体辅助分子束外延生长的 Ga NAs/ Ga As和Ga In NAs/ Ga As量子阱的影响

研究了离子损伤对等离子体辅助分子束外延生长的 Ga NAs/ Ga As和 Ga In NAs/ Ga As量子阱的影响 .研究表明离子损伤是影响 Ga NAs和 Ga In NAs量子阱质量的关键因素 .去离子磁场能有效地去除了等离子体活化产生的氮离子 .对于使用去离子磁场生长的 Ga NAs和 Ga In NAs量子阱样品 ,X射线衍射测量和 PL 谱测量都表明样品的质量被显著地提高 .Ga In As量子阱的 PL 强度已经提高到可以和同样条件下生长的 Ga In As量子阱相比较 .研究也表明使用的磁场强度越强 ,样品的光学质量提高越明显     

Ⅴ/Ⅲ比对InGaAs/InP的LPMOCVD生长的影响

介绍了利用LPMOCVD技术在InP衬底上生长In0.53Ga0.47As材料,获得表面平整、光亮的In0.53Ga0.47As外延层.研究了Ⅴ/Ⅲ比对表面形貌、结晶质量、电学质量的影响.在Ⅴ/Ⅲ比较低时,表面粗糙,要获得镜面状的表面形貌,Ⅴ/Ⅲ比必须大于40.Ⅴ/Ⅲ比对外延层结晶质量有影响.迁移率和本征载流子浓度随着Ⅴ/Ⅲ比的增加而增大.     

MBE自组织方法生长InGaAs/AlGaAs量子线FET材料

利用分子束外延 (MBE)技术在高指数面 Ga As衬底上自组织生长了应变 In Ga As/Ga As量子线材料。原子力显微镜 (AFM)观测结果表明量子线的密度高达 4× 1 0 5/cm。低温偏振光致发光谱 (PPL)研究发现其发光峰半高宽 (FWHM)最小为 9.2 me V,最大偏振度可达 0 .2 2。以 Al Ga As为垫垒 ,In Ga As/Ga As量子线为沟道 ,成功制备了量子线场效应管 (QWR-FET)结构材料 ,并试制了器件 ,获得了较好的器件结果     

采用多级变速法生长AlGaAs电流扩展层的850nm红外发光二极管

对采用多级变速法生长AlGaAs电流扩展层的850nm红外发光二极管进行了研究。研究发现,采用多级变速法生长n型Al0.25Ga0.75As电流扩展层有助于改善外延层表面形貌和后续外延层的晶体质量,从而减小850nm红外发光二极管的漏电流及串联电阻。此外,采用多级变速法生长n型Al0.25Ga0.75As电流扩展层还可以避免在多量子阱(MQW)有源区中形成非辐射复合中心,从而提高850nm红外发光二极管的亮度和寿命。     

GaAs/Si外延层的TEM研究

外延生长半导体材料中的微缺陷对其性能及应用有着关键性的影响,为此微观缺陷的研究的必要性就显得更突出了。而透射电子显微学恰是进行微缺陷研究的重要手段。本工作就Si衬底上外延生长Ga As开展研究。实验样品有两类:(1)在Si衬底上直接生长Ga As;(2)在Si衬底上先生长一定量的Ga AsIn Ga As超晶格作为缓冲层,而后再生长Ga As。实验结果表明两类样品中的Si衬底晶体完整度很好,外延层中存在着大量的晶体缺陷,但缺陷性质不完全类同。对于第(1)类样品缺陷以位错为主,同时有一些微孪     

GaAlAs/GaAs单量子阱列阵半导体激光器

分析了影响列阵半导体激光器输出功率的因素。利用分子束外延生长法生长出 Ga Al As/Ga As梯度折射率分别限制单量子阱材料 ( GRIN- SCH- SQW)。利用该材料制作出的列阵半导体激光器输出功率达到 10 W(室温 ,连续 ) ,峰值波长为 80 6～ 80 9nm     

一种InP/InGaAs PIN光电探测器芯片的设计与制作

In Ga As/In P PIN型光电探测器具有低暗电流、高灵敏度和响应速度快的特性,且能够吸收1-1.7μm红外波段光辐射,因此广泛应用于光纤通信系统。该文设计了一种平面型In Ga As/In P PIN光电探测器芯片,重点介绍了该芯片的外延结构与芯片加工工艺,并对芯片参数进行了测试。     

Morphological and electrical characterization of SixCryCzBv thin films

Si_xCr_yC_zB_v thin films with several compositions have been studied for integration of high precision resistors in 0.8 μm BICMOS technology. These resistors, integrated in the back-end of line, have the advantage to provide high level of integration and attractive electrical behavior in temperature, for analog devices. The film morphology and the structure have been investigated through transmission electron microscopy analysis and have been then related to the electrical properties on the base of the percolation theory. According to this theory, and in agreement with experimental results, negative thermal coefficient of resistance (TCR) has been obtained for samples with low Cr content, corresponding to a crystalline volume fraction below the percolation threshold.Samples with higher Cr content exhibit, instead, a variation of the TCR as a function of film thickness: negative TCR values are obtained for thickness lower than 5 nm, corresponding to a crystalline volume fraction below the percolation threshold; positive TCR are obtained for larger thickness, indicating the establishment of a continuous conductive path between the Cr rich grains. This property seems to be determinant in order to assure the possibility to obtain thin film resistors almost independent on the temperature.     

Performance improvement in tensile-strained In/sub 0.5/Al/sub 0.5/As/In/sub x/Ga/sub 1-x/As/In/sub 0.5/Al/sub 0.5/As metamorphic HEMT

This paper proposes a In/sub 0.5/Al/sub 0.5/As/In/sub x/Ga/sub 1-x/As/In/sub 0.5/Al/sub 0.5/As (x=0.3-0.5-0.3) metamorphic high-electron mobility transistor with tensile-strained channel. The tensile-strained channel structure exhibits significant improvements in dc and RF characteristics, including extrinsic transconductance, current driving capability, thermal stability, unity-gain cutoff frequency, maximum oscillation frequency, output power, power gain, and power added efficiency.     

Comparison between Pt/TiO2/Pt and Pt/TaOX/TaOY/Pt based bipolar resistive switching devices

Nonvolatile memories have emerged in recent years and have become a leading candidate towards replacing dynamic and static random-access memory devices. In this article, the performances of TiO₂ and TaO₂ nonvolatile memristive devices were compared and the factors that make TaO₂ memristive devices better than TiO₂ memristive devices were studied. TaO₂ memristive devices have shown better endurance performances (10⁸ times more switching cycles) and faster switching speed (5 times) than TiO₂ memristive devices. Electroforming of TaO₂ memristive devices requires~4.5 times less energy than TiO₂ memristive devices of a similar size. The retention period of TaO₂ memristive devices is expected to exceed 10 years with sufficient experimental evidence. In addition to comparing device performances, this article also explains the differences in physical device structure, switching mechanism, and resistance switching performances of TiO₂ and TaO₂ memristive devices. This article summarizes the reasons that give TaO₂ memristive devices the advantage over TiO₂ memristive devices, in terms of electroformation, switching speed, and endurance.     

Very low-noise Al/sub 0.3/Ga/sub 0.7/As/Ga/sub 0.65/In/sub 0.35/As/GaAs single quantum-well pseudomorphic HEMTs

AlGaAs/GaInAs/GaAs pseudomorphic HEMTs with an InAs mole fraction as high as 35% in the channel has been successfully fabricated. The device exhibits a maximum extrinsic transconductance of 700 mS/mm. At 18 GHz, a minimum noise figure of 0.55 dB with 15.0 dB associated gain was measured. At 60 GHz, a minimum noise figure as low as 1.6 dB with 7.6 dB associated gain was also obtained. This is the best noise performance yet reported for GaAs-based HEMTs.<>     

A 12 /spl times/ 12 In/sub 0.53/Ga/sub 0.47/As-In/sub 0.52/Al/sub 0.48/As avalanche photodiode array

We report a 12 /spl times/ 12 In/sub 0.53/Ga/sub 0.47/As-In/sub 0.52/Al/sub 0.48/As avalanche photodiode (APD) array. The mean breakdown voltage of the APD was 57.9 V and the standard deviation was less than 0.1 V. The mean dark current was /spl sim/2 and /spl sim/300 nA, and the standard deviation was /spl sim/0.19 and /spl sim/60 nA at unity gain (V/sub bias/ = 13.5 V) and at 90% of the breakdown voltage, respectively. External quantum efficiency was above 40% in the wavelength range from 1.0 to 1.6 /spl mu/m. It was /spl sim/57% and /spl sim/45% at 1.3 and 1.55 /spl mu/m, respectively. A bandwidth of 13 GHz was achieved at low gain.     

Lanthanum diffusion in the TiN/LaOx/HfSiO/SiO2/Si stack

Band edge Complementary Metal Oxide Semiconductor (CMOS) devices are obtained by insertion of a thin LaO_x layer between the high-k (HfSiO) and metal gate (TiN). High temperature post deposition anneal induces Lanthanum diffusion across the HfSiO towards the SiO₂ interfacial layer, as shown by Time of Flight Secondary Ions Mass Spectroscopy (ToF-SIMS) and Atom Probe Tomography (APT). Fourier Transform Infrared Spectroscopy in Attenuated Total Reflexion mode (ATR-FTIR) shows the formation of La-O-Si bonds at the high-k/SiO₂ interface. Soft X-ray Photoelectron Spectroscopy (S-XPS) is performed after partial removal of the TiN gate. Results confirm La diffusion and changes in the La chemical environment.     

The C-V-f and G/ω-V-f characteristics of Al/SiO2/p-Si (MIS) structures

The frequency dependence of capacitance-voltage (C-V) and conductance-voltage (G/ω-V) characteristics of the Al/SiO₂/p-Si metal-insulator-semiconductor (MIS) structures has been investigated taking into account the effect of the series resistance (R_s) and interface states (N_ss) at room temperature. The C-V and G/ω-V measurements have been carried out in the frequency range of 1 kHz to 1 MHz. The frequency dispersion in capacitance and conductance can be interpreted only in terms of interface states and series resistance. The N_ss can follow the ac signal and yield an excess capacitance especially at low frequencies. In low frequencies, the values of measured C and G/ω decrease in depletion and accumulation regions with increasing frequencies due to a continuous density distribution of interface states. The C-V plots exhibit anomalous peaks due to the N_ss and R_s effect. It has been experimentally determined that the peak positions in the C-V plot shift towards lower voltages and the peak value of the capacitance decreases with increasing frequency. The effect of series resistance on the capacitance is found appreciable at higher frequencies due to the interface state capacitance decreasing with increasing frequency. In addition, the high-frequency capacitance (C_m) and conductance (G_m/ω) values measured under both reverse and forward bias were corrected for the effect of series resistance to obtain the real diode capacitance. Experimental results show that the locations of N_ss and R_s have a significant effect on electrical characteristics of MIS structures.     

Al/sub 0.3/Ga/sub 0.7/As/In/sub x/Ga/sub 1-x/As (0/spl les/x/spl les/0.25) doped-channel field-effect transistors (DCFET's)

The properties of both lattice-matched and strained doped-channel field-effect transistors (DCFET's) have been investigated in AlGaAs/In/sub x/Ga/sub 1-x/As (0/spl les/x/spl les/0.25) heterostructures with various indium mole fractions. Through electrical characterization of grown layers in conjunction with the dc and microwave device characteristics, we observed that the introduction of a 150-/spl Aring/ thick strained In/sub 0.15/Ga/sub 0.85/As channel can enhance device performance, compared to the lattice-matched one. However, a degradation of device performance was observed for larger indium mole fractions, up to x=0.25, which is associated with strain relaxation in this highly strained channel. DCFET's also preserved a more reliable performance after biased-stress testings.<>     

Highly linear Al/sub 0.3/Ga/sub 0.7/N-Al/sub 0.05/Ga/sub 0.95/N-GaN composite-channel HEMTs

We report an Al/sub 0.3/Ga/sub 0.7/N-Al/sub 0.05/Ga/sub 0.95/N-GaN composite-channel HEMT with enhanced linearity. By engineering the channel region, i.e., inserting a 6-nm-thick AlGaN layer with 5% Al composition in the channel region, a composite-channel HEMT was demonstrated. Transconductance and cutoff frequencies of a 1 /spl times/100 /spl mu/m HEMT are kept near their peak values throughout the low- and high-current operating levels, a desirable feature for linear power amplifiers. The composite-channel HEMT exhibits a peak transconductance of 150 mS/mm, a peak current gain cutoff frequency (f/sub T/) of 12 GHz and a peak power gain cutoff frequency (f/sub max/) of 30 GHz. For devices grown on sapphire substrate, maximum power density of 3.38 W/mm, power-added efficiency of 45% are obtained at 2 GHz. The output third-order intercept point (OIP3) is 33.2 dBm from two-tone measurement at 2 GHz.