Estimation of SiC JFET temperature during short-circuit operations

This paper presents results showing the robustness of different SiC JFET transistors from SiCED in current limitation regime or short-circuit operation. Crystal temperature during failure was estimated after different electrical characterizations and using appropriate models of saturation current which is used as a thermal indicator. This work shows the exceptional robustness of SiC JFET transistors in current limitation mode compared to Si devices (MOSFETS and IGBTs).