| 14位流水线A/D转换器采样电容值的优化 |
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| 引用本文： | 袁小星,张世林,姚素英,徐江涛.14位流水线A/D转换器采样电容值的优化[J].微电子学,2006,36(6):725-728. |
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| 作者姓名： | 袁小星 张世林 姚素英 徐江涛 |
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| 作者单位： | 天津大学,电子与信息工程学院,天津,300072 |
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| 基金项目： | 国家自然科学基金;天津市科技攻关项目 |
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| 摘 要： | 针对14位流水线A/D转换器中各级采样电容值的优化问题,提出了在系统模型中加入热噪声模型的方法。在14位流水线A/D转换器结构下,通过系统级仿真,得出采样保持放大器(SHA)的采样电容Cs必须大于10 pF,第一级余数放大器的采样电容必须大于2 pF,才能使有限的采样电容引起系统信噪比的衰减小于1 dB的结论。
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| 关 键 词： | 流水线A/D转换器 采样电容 热噪声 系统级仿真 |
| 文章编号： | 1004-3365（2006）06-0725-04 |
| 收稿时间： | 2006-03-13 |
| 修稿时间： | 2006-03-132006-05-31 |
Magnitude Optimization of Sampling Capacitors in a 14-Bit Pipeline ADC |
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| YUAN Xiao-xing,ZHANG Shi-lin,YAO Su-ying,XU Jiang-tao.Magnitude Optimization of Sampling Capacitors in a 14-Bit Pipeline ADC[J].Microelectronics,2006,36(6):725-728. |
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| Authors: | YUAN Xiao-xing ZHANG Shi-lin YAO Su-ying XU Jiang-tao |
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| Affiliation: | School of Electronic Information Engineering, Tianjin University, Tianjin 300072, P. R. China |
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| Abstract: | In order to optimize the magnitude of sampling capacitors in a 14bit pipeline A/D converter(ADC),a method is presented to add thermal noise models into a system-level model.By means of system level simulation in Matlab,it is concluded that,in the architecture of the 14-bit pipelined ADC, the magnitude of sampling capacitors in the sample-and-hold amplifier(SHA) should be greater than 10 pF and the magnitude of sampling capacitors in the first-stage residue amplifier should be greater than 2 pF,so that the signal-to-noise ratio(SNR) attenuation of the system due to limited magnitude of sampling capacitors could be kept below 1 dB. |
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| Keywords: | Pipelined A/D converter Sampling capacitor Thermal noise System level simulation |
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