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Automated Robust Design and Optimization of Integrated Circuits by Means of Penalty Functions |
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| Authors: | rpd B&#x;rmen Drago Strle Franc Bratkovi Janez Puhan Iztok Fajfar Tadej Tuma |
| Affiliation: | aUniversity of Ljubljana, Faculty of Electrical Engineering, Tržaška cesta 25, SI-1000 Ljubljana, Slovenia. |
| Abstract: | |
| Keywords: | Circuit sizing Analog IC Optimization Penalty function CAD |
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