| 基于FPGA的多普勒计程仪硬件平台设计 |
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| 引用本文： | 马修准,戴绍港,易志强,赵知劲.基于FPGA的多普勒计程仪硬件平台设计[J].杭州电子科技大学学报,2014(1):75-78. |
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| 作者姓名： | 马修准 戴绍港 易志强 赵知劲 |
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| 作者单位： | 杭州电子科技大学通信工程学院,浙江杭州310018 |
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| 基金项目： | 基金项目：浙江省科技计划公益技术研究资助项目（2012C21085） |
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| 摘 要： | 该文根据系统性能指标要求、算法特点和FPGA的相关特性,系统先介绍了系统组成模块的设计和各个模块的作用;然后重点对同步采样、数据存储与处理、编码信号产生和通讯模块作了详细论述,说明了相应的工作原理,给出了它们的原理框图;最后展示了电路板实物焊接图。
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| 关 键 词： | 现场可编程门阵列 模块设计 数据处理 |
The Hardware Design of Doppler Velocity Log |
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| Ma Xiuzhun,Dai Shaogang,Yi Zhiqiang,Zhao Zhijin.The Hardware Design of Doppler Velocity Log[J].Journal of Hangzhou Dianzi University,2014(1):75-78. |
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| Authors: | Ma Xiuzhun Dai Shaogang Yi Zhiqiang Zhao Zhijin |
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| Affiliation: | Ma Xiuzhun, Dai Shaogang, Yi Zhiqiang, Zhao Zhijin |
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| Abstract: | According to the requirements of system performance index , properties of the algorithm and characteristics of FPGA , firstly the blocks of the entire system as well as the function of each block are introduced .Then synchronously sampling module , data saving and processing module , coded signal producing module and communications module are expounded in detail , at the same time , explaining how the blocks work with each other .Lastly the real welding circuit wafer is displayed . |
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| Keywords: | field programmable gate array block design data processing |
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