| 高速USB IP核的设计与开发 |
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| 引用本文： | 付华杰,刘丽君,张遂南. 高速USB IP核的设计与开发[J]. 微电子学与计算机, 2008, 25(7) |
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| 作者姓名： | 付华杰 刘丽君 张遂南 |
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| 作者单位： | 西安微电子技术研究所,陕西西安,710054 |
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| 摘 要： | 嵌入式系统向小型化和低功耗的方向发展要求减小板级设计的面积提高速率.基于以上设计的要求对USB系统进行模块划分并利用Verilog语言设计出高速USB接口IP核.经过仿真验证,该IP核满足USB2.0的传输要求.
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| 关 键 词： | USB 通信接口 IP核 FPGA |
The Design and Development of the High USB IP Core |
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| FU Hua-jie,LIU Li-jun,ZHANG Sui-nan. The Design and Development of the High USB IP Core[J]. Microelectronics & Computer, 2008, 25(7) |
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| Authors: | FU Hua-jie LIU Li-jun ZHANG Sui-nan |
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| Abstract: | The embedded system is developing with small area and low power.It requires deduce the board design and increase the speed.Debase above,this paper divide the USB modules and design the USB interface IP core with Verilog.With simulation,this IP core contents the USB2.0's request. |
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| Keywords: | USB communication interface IP core FPGA |
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