| 16位CISC CPU的FPGA设计 |
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| 引用本文： | 许笛,刘昌华,安轲,冯平跃. 16位CISC CPU的FPGA设计[J]. 计算机与数字工程, 2011, 39(5): 167-170 |
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| 作者姓名： | 许笛 刘昌华 安轲 冯平跃 |
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| 作者单位： | 武汉工业学院计算机与信息工程系,武汉,430023 |
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| 基金项目： | 省教育厅教研项目，武汉工业学院大学生创新实验计划 |
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| 摘 要： | 介绍了一种基于FPGA技术的16位CISC的微处理器系统的设计。该系统采用VHDL语言自顶向下的设计方法,可以完成算术和逻辑运算、数据内部传输、数据位操作、逻辑判断与跳转、数据输入输出共5大类,32条指令。在QuartusⅡ9.0中仿真成功,结果表明该CPU可以准确地完成各种指令组成的程序。
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| 关 键 词： | FPGA CISC CPU VHDL |
Design of a 16 bit CISC CPU Based on FPGA |
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| Xu Di,Liu Changhua,An Ke,Feng Pinyao. Design of a 16 bit CISC CPU Based on FPGA[J]. Computer and Digital Engineering, 2011, 39(5): 167-170 |
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| Authors: | Xu Di Liu Changhua An Ke Feng Pinyao |
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| Affiliation: | Xu Di Liu Changhua An Ke Feng Pinyao(Department of Computer and Information Engineering,Wuhan Polytechnic University,Wuhan 430023) |
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| Abstract: | This paper describes a kind of technique based on FPGA,which can be used on 16-bit CISC microprocessor systems of varieties of FPGA chips.With the top-down design method of VHDL,the CPU system is designed to execute 32 instructions which can achieve 5 categories of functions： mathematical and logical operations,the internal data transfer,data bit operations,logical judgement and jump,data input and output.Then,the simulation was successful in the Quartus Ⅱ 9.0 integrated simulation environment.It was proved that the system can work well. |
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| Keywords: | FPGA CISC CPU VHDL |
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