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基于FPGA的PUSCH信道估计仿真与实现
引用本文:董宏成,步清明,李小文,施流伟. 基于FPGA的PUSCH信道估计仿真与实现[J]. 电子技术应用, 2012, 38(6): 51-53
作者姓名:董宏成  步清明  李小文  施流伟
作者单位:重庆邮电大学通信与信息工程学院,重庆,400065
基金项目:国家科技重大专项基金资助项
摘    要:基于最小平方(LS)算法,利用FPGA实现了一种适用于TD-LTE系统的上行信道估计算法。主要研究了如何利用FPGA实现LS算法,包括算法的介绍、方案的形成、FPGA实现的处理流程、FPGA实现结果及分析。以Virtex-5芯片为硬件平台,完成了仿真、综合、板级验证等工作。实现结果表明,该信道估计算法应用到TD-LTE系统具有良好的稳定性和可行性。

关 键 词:FPGA实现  TD-LTE系统  信道估计  LS算法  Virtex-5

Simulation and realization of channel estimation and in TD-LTE system based on FPGA
Dong Hongcheng , Bu Qingming , Li Xiaowen , Shi Liuwei. Simulation and realization of channel estimation and in TD-LTE system based on FPGA[J]. Application of Electronic Technique, 2012, 38(6): 51-53
Authors:Dong Hongcheng    Bu Qingming    Li Xiaowen    Shi Liuwei
Affiliation:(School of Communication and Information Engineering,Chongqing University of Posts and Telecommunications,Chongqing 400065,China)
Abstract:Based on the Least Square (LS) algorithm,a novel uplink channel estimation algorithm in TD-LTE system is improved and realized by FPGA.This paper studies the implementation of uplink channel estimation based on FPGA.It includes introduction of the algorithm,projects completing,dispose process of FPGA implementation and analysis of FPGA implementation.Then it finishes simulation,synthesis and verification of the board on Virtex-5.Implementation results show that this channel estimation algorithm have a very good feasibility and stability in TD-LTE system.
Keywords:FPGA implementation  TD-LTE system  channel estimation  LS algorithm  Virtex-5
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