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大面阵CCD图像实时显示系统的设计
引用本文:王明富,杨世洪,吴钦章. 大面阵CCD图像实时显示系统的设计[J]. 光学精密工程, 2010, 18(9): 2053-2059. DOI: 10.3788/OPE.20101809.2053
作者姓名:王明富  杨世洪  吴钦章
作者单位:1. 中国科学院,光电技术研究所,四川,成都,610209;中国科学院,研究生院,北京,100049
2. 中国科学院,光电技术研究所,四川,成都,610209
基金项目:大科学工程国家遥感综合平台项目 
摘    要:为解决基于CameraLink接口的相机必须使用专用采集卡和系统机才能显示的问题,设计了一种结构简单、携带方便的图像实时显示系统。该系统采用2片SDRAM对图像进行交替缓存,并在Xilinx公司的Spatan3系列现场可编程门阵列(FPGA)中完成了较为复杂的主要控制逻辑。将CameraLink输入的图像经过拼接、BIN等预处理后缓存到1片SDRAM,同时按照一定格式以25frame(50field)/s的速度读出另1片SDRAM中的图像,经ADV7300转换成模拟电视信号后送到模拟显示器显示。结果表明,在相机帧频为3.6frame/s时,该系统可以实时显示大面阵CCD数字航测相机拍摄的图像,能观察不同分辨率的图像以及原图像任何部位的细节,并能根据天气条件调整显示亮度以更好地观察图像。该系统只包含1块电路板和1个模拟显示器,已成功应用于4008×5344面阵的CCD数字航测相机中。

关 键 词:CCD图像  实时显示  CameraLink接口  现场可编程门阵列(FPGA)  Bin操作  SDRAM控制器
收稿时间:2009-09-21
修稿时间:2009-12-10

D esign of large-array CCD real-time display system
WANG Ming-fu,YANG Shi-hong,WU Qin-zhang. D esign of large-array CCD real-time display system[J]. Optics and Precision Engineering, 2010, 18(9): 2053-2059. DOI: 10.3788/OPE.20101809.2053
Authors:WANG Ming-fu  YANG Shi-hong  WU Qin-zhang
Affiliation:1. Institute of Optics and Electronics, Chinese Academy of Sciences, Chengdu 610209, China;;2. Graduate University of Chinese Academy of Sciences, Beijing 100049, China
Abstract:As the CCD camera based on CameraLink interface can not display images without a dedicated data acquisition card and system computer, a kind of simple and real-time image display system was designed for a 4 008×5 344 array CCD camera based on CameraLink interface. Two SDRAMs were used in the system to storage images alternately, and the main logical function was accomplished in a Spatan3 family Field Programming Gate Array(FPGA) from Xilinx Company. The image data from CameraLink were storaged in a SDRAM by stitching and BIN processing,meanwhile,the image data read from another SDRAM at a speed of 25 frame/s(50 field /s) were convert to standard TV analog signals by a digital-to-analog encoder chip ADV7300 to display in an analog monitor. The verification results show that the system can real-time display the images of the large-array digital aerial camera with different resolutions and their details at a speed of 3.6 frame /s,and also can adjust the brightness of the images to get a good observation according to the weather conditions. The designed system only contains one PCB board and one alanog monitor and has been used in a CCD digital aerial camera with the 4 008×5 344 array successfully.
Keywords:CCD image  real time display  CameraLink interface  Field Programming Gate Array(FPGA)  Bin operation  SDRAM controller
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