| 改进的以SMT为基础的实时系统限界模型检测 |
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| 引用本文： | 徐 亮. 改进的以SMT为基础的实时系统限界模型检测[J]. 计算机系统应用, 2010, 19(7): 1491-1502 |
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| 作者姓名： | 徐 亮 |
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| 作者单位： | 中国科学院 软件研究所 计算机科学国家重点实验室,北京 100190 |
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| 基金项目： | Supported by the National Natural Science Foundation of China under Grant Nos.60721061, 60833001 (国家自然科学基金); the CAS Innovation Program of China (中国科学院知识创新工程领域前沿项目); the Knowledge Innovation Key Directional Program of the Chinese Academy of Sciences under Grant No.KGCX2-YW-125 (中国科学院知识创新工程重要方向项目) |
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| 摘 要： | 基于SAT的限界模型检测在处理实时系统时具有很高的复杂度.SMT求解器在计算可满足性的同时,还能处理算术和其他可判定性理论.在对实时系统进行检测时,用SMT求解器代替SAT求解器,系统里的时钟就可以用整型或实型变量表示,时钟约束则可以直接表示成线性算术表达式,从而使整个检测过程更加高效.带时间参数的计算树逻辑(timed computation tree logic,简称TCTL)被用来描述实时系统里的性质.同时,还对检测方法作了相应的改进.
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| 关 键 词： | 限界模型检测 可满足性模块理论 实时系统 时间自动机 时间Kripke结构 带时间参数的计算树逻辑 |
Improved SMT-Based Bounded Model Checking for Real-Time Systems |
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| XU Liang. Improved SMT-Based Bounded Model Checking for Real-Time Systems[J]. Computer Systems& Applications, 2010, 19(7): 1491-1502 |
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| Authors: | XU Liang |
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| Abstract: | SAT-Based bounded model checking (BMC) has high complexity in dealing with real-time systems. Satisfiability modulo theories (SMT) solvers can generalize SAT solving by adding the ability to handle arithmetic and other decidable theories. This paper uses SMT in BMC for real-time systems instead of SAT. The clocks can be represented as integer or real variables directly and clock constraints can be represented as linear arithmetic expressions. These make the checking procedure more efficient. TCTL (timed computation tree logic) is used to specify the properties of real-time systems and improvement of the encodings has been done. |
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| Keywords: | bounded model checking satisfiability modulo theories real-time system timed automata timed Kripke structure TCTL (timed computation tree logic) |
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