| 一种新型低功耗准动态移位寄存器的模拟 |
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| 引用本文： | 金湘亮,陈杰,仇玉林. 一种新型低功耗准动态移位寄存器的模拟[J]. 固体电子学研究与进展, 2004, 24(1): 117-122 |
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| 作者姓名： | 金湘亮 陈杰 仇玉林 |
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| 作者单位： | 中国科学院微电子研究所,北京,100029;中国科学院微电子研究所,北京,100029;中国科学院微电子研究所,北京,100029 |
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| 摘 要： | 提出一种低功耗准动态移位寄存器电路 ,这种电路静态功耗几乎为 0 ,仅仅存在动态功耗 ;是一种无比电路 ,所有的开关和反相器晶体管按最小尺寸进行设计 ,电路简单 ,面积小 ;该种电路不存在电荷的再分配 ,漏电流损失的电荷可从电源补充。采用 1 .2μm的 CMOS工艺 ,用 PSPICE8.0对该电路进行仿真验证。这种低功耗准动态移位寄存器电路已成功用作 CMOS图像传感器的读出扫描电路。
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| 关 键 词： | 低功耗 动态电路 移位寄存器 CMOS图像传感器 |
| 文章编号： | 1000-3819(2004)01-117-06 |
| 修稿时间： | 2003-01-20 |
PSPICE Simulation of New Low-power Quasi-dynamic Shift Register for CMOS Pixel Readout Scan Circuit |
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| JIN Xiangliang CHEN Jie QIU Yulin. PSPICE Simulation of New Low-power Quasi-dynamic Shift Register for CMOS Pixel Readout Scan Circuit[J]. Research & Progress of Solid State Electronics, 2004, 24(1): 117-122 |
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| Authors: | JIN Xiangliang CHEN Jie QIU Yulin |
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| Abstract: | In this paper a new low-power quasi-dynamic shift register is presented. It is of low power dissipation near to 0 for the static power and has only dynamic power. This register is a ratioless circuit to reduce the area and does not have the problem of charge sharing and can renew the lost charge through the supply power. Based on the 1.2 μm CMOS process, the low-power quasi-dynamic shift register has been simulated and tested using the software PSPICE8.0. The proposed shift register has been used as the readout scan circuit of the CMOS imagers. |
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| Keywords: | low power dynamic circuit shift register CMOS imagers |
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