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High performance real-time neural scheduler for ATM switches |
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| Authors: | Pousada-Carballo J.M. Gonzalez-Castano F.J. Rodriguez-Hernandez P.S. Garcia-Palomares U.M. |
| Affiliation: | Dept. de Tecnologias de las Commun., Campus Univ. de Vigo; |
| Abstract: | Input-buffered asynchronous transfer mode (ATM) packet switches are simpler than output-buffered switches. However, due to HOL blocking, their throughput is poor. Neural schedulers represent a promising solution for high throughput input-buffered switching, but their response time variance is too high for realistic hard real-time constraints. To overcome this problem, we formulate and evaluate a new neural scheduler with bounded response time |
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