| 可用于高密度高速度领域的一种新型两端静态存储单元的设计 |
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| 引用本文： | 童小东,吴昊,梁擎擎,钟会才,朱慧珑,赵超,叶甜春.可用于高密度高速度领域的一种新型两端静态存储单元的设计[J].半导体学报,2014,35(1):014006-5. |
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| 作者姓名： | 童小东 吴昊 梁擎擎 钟会才 朱慧珑 赵超 叶甜春 |
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| 摘 要： | A vertical two-terminal silicon PNPN diode is presented for use in a high-density memory cell. The device design for high-speed operations was studied with experiments and calibrated simulations, which proves that the proposed memory cell can be operated at nanosecond range. The static and dynamic power dissipations were also studied, which indicated the availability of the proposed memory cell for VLS1 applications. Moreover, the memory cell is compatible with CMOS process, has little impact from process variation, and has good reliability.
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| 关 键 词： | 高速存储器 硅二极管 设备设计 高密度 应用 双端 CMOS工艺 存储单元 |
Design of two-terminal PNPN diode for high-density and high-speed memory applications |
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| Tong Xiaodong,Wu Hao,Liang Qingqing,Zhong Huicai,Zhu Huilong,Zhao Chao and Ye Tianchun.Design of two-terminal PNPN diode for high-density and high-speed memory applications[J].Chinese Journal of Semiconductors,2014,35(1):014006-5. |
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| Authors: | Tong Xiaodong Wu Hao Liang Qingqing Zhong Huicai Zhu Huilong Zhao Chao and Ye Tianchun |
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| Affiliation: | Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China;Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China;Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China;Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China;Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China;Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China;Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China |
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| Abstract: | A vertical two-terminal silicon PNPN diode is presented for use in a high-density memory cell. The device design for high-speed operations was studied with experiments and calibrated simulations, which proves that the proposed memory cell can be operated at nanosecond range. The static and dynamic power dissipations were also studied, which indicated the availability of the proposed memory cell for VLSI applications. Moreover, the memory cell is compatible with CMOS process, has little impact from process variation, and has good reliability. |
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| Keywords: | PNPN diode memory cell high-density |
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