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图形处理器空间插值并行算法的实现
引用本文:赵艳伟,程振林,董慧,方金云.图形处理器空间插值并行算法的实现[J].中国图象图形学报,2012,17(4):575-581.
作者姓名:赵艳伟  程振林  董慧  方金云
作者单位:中国科学院计算技术研究所, 北京 100190; 中国科学院研究生院, 北京 100049;中国科学院计算技术研究所, 北京 100190;中国科学院计算技术研究所, 北京 100190; 中国科学院研究生院, 北京 100049;中国科学院计算技术研究所, 北京 100190
基金项目:国家高技术研究发展计划(863)基金项目(2009AA12Z220,2009AA12Z226)
摘    要:空间插值是地理信息系统(GIS)空间分析中计算复杂且耗时的操作,因此无法满足实时性的要求。随着图形处理器(GPU)浮点计算能力的大幅提高,GPU通用计算已成为处理GIS领域内复杂计算的研究热点。为实时化一些传统低效的算法提供了良好的契机。利用GPU在并行计算上的优势,将反距离加权法插值算法映射到了统一计算设备架构(CUDA)并行编程架构。首先在GPU中建立二级索引使计算层次得到了合理的划分,然后利用多线程分块策略执行并行插值计算。最后通过实验表明,该方法的插值误差与CPU方法相比能控制在10-6数量级,并且在插值半径较大插值数据较多的情况下,该算法可达到40倍以上的加速比。充分证明了该方法的正确性及高效性。

关 键 词:地理信息系统  并行插值  图形处理器  统一计算设备架构
收稿时间:2011/6/18 0:00:00
修稿时间:2011/10/8 0:00:00

Realization of GPU parallel spatial interpolation method
Zhao Yanwei,Cheng Zhenlin,Dong Hui and Fang Jinyun.Realization of GPU parallel spatial interpolation method[J].Journal of Image and Graphics,2012,17(4):575-581.
Authors:Zhao Yanwei  Cheng Zhenlin  Dong Hui and Fang Jinyun
Affiliation:Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100190, China; Graduate University of Chinese Academy of Sciences, Beijing 100049, China;Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100190, China;Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100190, China; Graduate University of Chinese Academy of Sciences, Beijing 100049, China;Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100190, China
Abstract:Interpolation is one computational complex and time-consuming operation in the fields of spatial analysis that can not meet the real time demand. With the rapid increase of GPU floating-point computing power, general-purpose computation on graphics processors (GPGPU) has became an evolving research field in spatial information processing, and it provides an opportunity to accelerate some traditional inefficient algorithms. In this paper, we map the inverse distance weighted (IDW) interpolation method to the compute unified device architecture (CUDA) parallel programming model. Taking the advantage of graphics processing unit (GPU) parallel computing, we build two-level indexes on GPU, then blocking schemes are used to assign computing task among different threads. After illustrating the parallel interpolation process, we conduct several experiments, The experiment result shows that the error of this new method can control under 10-6 compared with CPU-based method. With larger influence radius and massive data, the performance can obtain above 40 times speedups over a very similar single-threaded CPU implementation. It is demonstrated the correctness and high efficiency of our optimized implementation.
Keywords:geographic information system  parallel interpolation  graphics processing unit  compute unified device architecture
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