| STM32与FPGA的B码时统解码设计 |
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| 引用本文： | 杨会玲,唐彬,王军.STM32与FPGA的B码时统解码设计[J].单片机与嵌入式系统应用,2013(9):22-25. |
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| 作者姓名： | 杨会玲 唐彬 王军 |
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| 作者单位： | 1. 苏州科技学院,苏州,215011
2. 安徽理工大学 |
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| 基金项目： | 江苏省青年科学基金(编号SBK201242850)。 |
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| 摘 要： | 针对B码时统解码的精度及硬件使用效率等问题，结合B码原理，从应用角度出发，提出一种新型的B码的解码方案。利用微控制器STM32辅助可编程逻辑器件（FPGA），进行全局解码设计。测试表明，DC码的秒头精度误差控制在ns级，且DC码和AC码解码所提取出的时间信息都非常准确。
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| 关 键 词： | STM32 FPGA IRIG—B码 时统解码 |
Design of B Code Time Decoding Based on STM 32 and FPGA |
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| Yang Huiling
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Tang Bin
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Wang Jun.Design of B Code Time Decoding Based on STM 32 and FPGA[J].Microcontrollers & Embedded Systems,2013(9):22-25. |
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| Authors: | Yang Huiling Tang Bin Wang Jun |
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| Affiliation: | 1. Suzhou University of Science and Technology, Suzhou 215011, China;2. Anhui University of Science and Technology) |
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| Abstract: | For the problems of B coders decoding accuracy and the efficiency of hardware, combined with the B code principle, from the application point of view, this paper put forward a new kind of B code＇s decoding method, using microcontrolter STM32 to assist FPGA with the global decoding design. The experiment shows that the second bead＇s precision error of DC code is in ns level, and the decoding time information of DC and AC code are both very accurate. |
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| Keywords: | STM32 FPGA IRIG-B code time decoding |
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