| 改进的解耦双同步坐标系锁相环的设计与实现 |
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| 引用本文： | 周元峰,段善旭,刘宝其,冯鑫振.改进的解耦双同步坐标系锁相环的设计与实现[J].电力电子技术,2012,46(8):68-70. |
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| 作者姓名： | 周元峰 段善旭 刘宝其 冯鑫振 |
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| 作者单位： | 华中科技大学,强电磁工程与新技术国家重点实验室,湖北武汉430074 |
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| 基金项目： | 国家重点基础研究发展973计划资助项目 |
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| 摘 要： | 微网中的电压可能会存在较大的谐波和不平衡,因此要求锁相环(PLL)能够迅速、准确地确定电网正序电压的相位。提出的改进型解耦双同步坐标系PLL通过在q轴加入6次谐波的陷波器,可抑制电网中的5次负序电压和7次正序电压对锁相的影响。锁相程序在相位变化较大时改变正弦表的指针,在相位或频率变化较小时调节DSP周期寄存器。实验证明了该锁相方法的有效性。
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| 关 键 词： | 锁相环 双同步坐标系 解耦陷波器 |
The Design and Implementation of an Improved Decoupled Double Synchronous Reference Frame PLL |
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| ZHOU Yuan-feng
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DUAN Shan-xu
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LIU Bao-qi
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FENG Xin-zhen.The Design and Implementation of an Improved Decoupled Double Synchronous Reference Frame PLL[J].Power Electronics,2012,46(8):68-70. |
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| Authors: | ZHOU Yuan-feng DUAN Shan-xu LIU Bao-qi FENG Xin-zhen |
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| Affiliation: | (State Key Laboratory of Advanced Electromagnetic Engineering and Technology, Huazhong University of Science and Technology,Wuhan 430074,China) |
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| Abstract: | The voltage in micro-grid may be unbalanced and contain too much low-frequency harmonics,so the grid positive-sequence voltage phase should be estimated quickly and accurately.The 6th band trap is added in the q-axis in decoupled double synchronous reference frame phase locked loop(PLL),so the influence of the 5th negative-sequence and 7th positive-sequence voltage can be suppressed.The sine-wave pointer will be changed if the phase changes greatly,otherwise the period register will be changed.The function of the PLL is verified by experiment. |
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| Keywords: | phase locked loop double synchronous reference frame decoupled band trap |
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