Loop transformations to prevent false sharing |
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Authors: | Elana D. Granston Thierry Montaut François Bodin |
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Affiliation: | (1) Rice University Center for Research on Parallel Computation, 6100 South Main Street, 77005 Houston, Texas;(2) IRISA, Campus de Beaulieu, 35042 Rennes, Cedex, France |
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Abstract: | To date, page management in shared virtual memory (SVM) systems has been primarily the responsibility of the run-time system. However, there are some problems that are difficult to resolve efficiently at run time. Chief among these is false sharing. In this paper, a loop transformation theory is developed for identifying and eliminating potential sources of multiple-writer false sharing and other sources of page migration resulting from regular references in numerical applications. Loop nests of one and two dimensions (before blocking) with single-level, DOALL-style parallelism are covered. The potential of these transformations is demonstrated experimentally. Supported by a Postdoctoral Research Associateship in Computational Science and Engineering under National Science Foundation Grant No. CDA-9310307, and by the Center for Research on Parallel Computation under Grant No. CCR-9120008. Supported by the Esprit Agency XIII under Grant No. APPARC 6634 BRA III and Intel SSD under Grant No. 1 92 C 250 00 31318 01 2. |
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Keywords: | False sharing page-level affinity scheduling loop transformations shared virtual memory |
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