快速锁定、宽带双环路频率综合器的数字粗调环路

提出了一种用于宽带、双环路频率综合器的粗调环路结构.该粗调环路由数字电路设计实现,包含逐次逼近寄存器和新结构的频率比较单元两个模块.其中,频率比较单元在一定的参考时间内对预分频器的输出信号周期进行计数,然后通过比较计数结果与预设值的大小来估计VCO输出频率.对比较误差进行了详细分析,分析表明,在一定的比较时间内该结构的比较误差比现有结构小20倍,而且由于重复利用可编程分频器作为粗调环路的一部分,整体电路也大为简化.

Digital Coarse Tuning Loop for Wide-Band Fast-Settling Dual-Loop Frequency Synthesizers

A new coarse tuning loop for a wide-band dual-loop frequency synthesizer is presented. The coarse tun ing structure is composed of two digital modules, including a successive approximation register and a frequency comparator with a novel structure. The frequency comparator counts the prescaler cycles within a certain reference time and compares the number with preset data to estimate the VCO frequency. The frequency comparison error is analyzed in detail. Within a given coarse tuning time,our proposed structure shows a comparison error 20times smaller than that of other reported structures. This structure also reuses the programmable divider as a part of the coarse tuning loop so that the circuit is greatly simplified.