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基于USB 3.0的高速数据传输接口设计
引用本文:周晨曦,曾国强.基于USB 3.0的高速数据传输接口设计[J].计算机测量与控制,2020,28(5):146-150.
作者姓名:周晨曦  曾国强
作者单位:成都理工大学核技术与自动化工程学院,成都610051;成都理工大学核技术与自动化工程学院,成都610051
基金项目:国家重点研发计划项目(2017YFC0602100);国家自然科学(41474159); 四川省科技支撑计划项目(2017GZ0390)
摘    要:针对在高速数据采集过程中,需要向计算机实时传输大量数据,通过对各种传输方式的研究分析,提出了采用USB 3.0传输方式进行数据传输,设计了基于USB 3.0的高速数据传输接口,接口实现的关键技术之一是稳定数据传输的速度。通过对各种USB 3.0芯片分析,采用了FTDI公司生产的FT601芯片,根据相应的数据手册,完成对FT601芯片的外围电路,采用可编程逻辑门阵列(FPGA)作为USB 3.0传输控制器。使用Verilog语言对FPGA内部进行编程,实现使用先进先出(FIFO)方式对数据进行缓存,控制FT601芯片完成与上位机之间的数据交换,并进行测试。测试结果表明,接口能在进行相应配置后,以平均350MB/s的速率传输数据,保证了数据传输速度的稳定性和数据的完整性。

关 键 词:高速数据传输  USB  3.0  FT601  可编程逻辑门阵列  FIFO
收稿时间:2019/9/20 0:00:00
修稿时间:2019/10/23 0:00:00

Design of high speed data transmission interface based on USB3.0
Abstract:In the process of high-speed data acquisition, a large amount of data needs to be transmitted to the computer in real time. Through the research and analysis of various transmission methods, the data transmission using USB 3.0 transmission method is proposed, and the high-speed data transmission interface based on USB 3.0 is designed. One of the key technologies is to stabilize the speed of data transmission. Through the analysis of various USB 3.0 chips, the FT601 chip produced by FTDI is used. According to the corresponding data manual, the peripheral circuit of the FT601 chip is completed, and the field programmable gate array (FPGA) is used as the USB 3.0 transmission controller. The internal programming of the FPGA is performed using the Verilog language, and the data is buffered by using a first-in-first-out (FIFO) method, and the data exchange between the FT601 chip and the host computer is controlled and tested. The test results show that the interface can transmit data at an average rate of 350MB/s after corresponding configuration, ensuring the stability of data transmission speed and data integrity.
Keywords:High-speed data transmission  USB 3  0  FT601  Field Programmable Gate Array  FIFO
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