| 基于VHDL的线性分组码编译码器设计 |
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| 引用本文： | 唐炳华,税奇军.基于VHDL的线性分组码编译码器设计[J].现代电子技术,2010,33(9):116-117,120. |
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| 作者姓名： | 唐炳华 税奇军 |
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| 作者单位： | 四川文理学院,物理与工程技术系,四川,达州,635000 |
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| 摘 要： | 数字信号在传输过程中受到干扰的影响,降低了其传输的可靠性,线性分组码作为一种常用的信道编码,在通信传输系统中应用广泛。在对线性分组码的编译码规则研究基础上,讨论了生成矩阵、监督矩阵与错误图样集之间的关系,在Max＋PlusⅡ开发环境中,用VHDL语言设计线性分组码编译码器,对其各项设计功能进行了仿真和验证。结果表明,该设计正确,其功能符合线性分组码编译码器的要求。
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| 关 键 词： | 信道编码 线性分组码 Max＋PlusⅡ VHDL |
Design of Linear Block Codes Based on VHDL |
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| TANG Bing-hua,SHUI Qi-jun.Design of Linear Block Codes Based on VHDL[J].Modern Electronic Technique,2010,33(9):116-117,120. |
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| Authors: | TANG Bing-hua SHUI Qi-jun |
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| Affiliation: | TANG Bing-hua,SHUI Qi-jun(Department of Physics , Engineering Technology,Sichuan University of Arts , Science,Dazhou 635000,China) |
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| Abstract: | The interference reduces transmission reliability when digital signal is transmissed in signal path.Linear block code is widely used in communication transmission system as a common channel coding.The generating matrix,monitoring matrix and the relationship between the error pattern sets are discussed based on the coding and decoding rules of linear block codes.The Max＋Plus Ⅱ software simulation and verification shows that its function comforms to the linear block code encoding and decoding device requirements. |
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| Keywords: | VHDL |
| 本文献已被 CNKI 维普 万方数据 等数据库收录！ |
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