| Au/PZT/BIT/p-Si结构铁电 存储二极管I-V 特性 |
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| 引用本文： | 于军,王华,董晓敏,周文利,王耘波,郑远开,赵建洪.Au/PZT/BIT/p-Si结构铁电 存储二极管I-V 特性[J].半导体学报,2001,11(2). |
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| 作者姓名： | 于军 王华 董晓敏 周文利 王耘波 郑远开 赵建洪 |
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| 作者单位： | 1. 华中理工大学电子科学与技术系, 武汉 430074
2. 华中理工大学电子科学与技术系, 武汉 430074 桂林电子工业学院电子信息分院， 桂林 541004 |
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| 摘 要： | 采用脉冲激光沉积方法（PLD）制备了Au/PZT/BIT/p-Si多层结构铁电存储二极管.对铁电存储二极管的P-E电滞回线、I-V特性曲线分别进行了测试与分析，并对其导电行为及基于I-V特性回滞现象的存储机理进行了讨论.实验表明，所制备的多层铁电薄膜具有较高的剩余极化（27μC/cm2）和较低的矫顽场（48kV/cm），BIT铁电层有助于缓解PZT与Si衬底之间的界面反应和互扩散，减少界面态，与Au/PZT/p-Si结构相比，漏电流密度降低近两个数量级，I-V特性曲线回滞窗口明显增大.
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| 关 键 词： | 二极管 I-V特性 PLD |
I-V Characteristics of Ferroelectric Memory Diode with Structure of Au/PZT/BIT/p-Si |
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| Abstract: | A new ferroelectric memory diode that consists of Au/PZT/BIT/p-Si was fabricated by Pulsed Laser Deposition (PLD) technique.Ferroelectric and electrical properties of the ferroelectric diode have been characterized through the measurements of P-E and I-V hysteresis loop respectively.The conductivity behavior and the memory mechanism have been discussed.The results suggest that the multilayer ferroelectric thin films have a large polarization of 27μC/cm2 and a low coercive of 48kV/cm.The growth of the BIT ferroelectric layer weakens the serious interaction and interdiffusion in the PZT/Si interface, decreases the leak current density but enlarges the window of I-V hysteresis loop. |
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