Multiobjective scheduling for IC sort and test with a simulationtestbed

In manufacturing environments such as an integrated circuit (IC) sort and test floor, typically more than one objective, such as cycle time and on-time delivery, needs to be simultaneously considered. With multiple objectives, a good solution is called Pareto optimal if it is not inferior to any other feasible solutions in terms of all objectives. The Pareto boundary is the set of all Pareto optimal solutions, which indicates the tradeoff of all good solutions. In this paper, a multiobjective model for IC sort and test is formulated, based upon the current information at any given instant. An approximate Pareto boundary can then be found using the Lagrangian relaxation method for the model. New algorithms are used to solve the dual problem and obtain feasible solutions from the associated subproblem solutions. The impact of the new scheduling approach on performance is illustrated through numerical examples by comparing it with corresponding single-objective problems and various heuristic dispatching rules. Its performance in dynamic and stochastic environments for real world applications is evaluated by using a simulation testbed. Simulation results definitely indicate a high potential for our approach