| 基于FPGA的高速FIR滤波器设计 |
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| 引用本文： | 曹树胜,李小京. 基于FPGA的高速FIR滤波器设计[J]. 仪器仪表用户, 2012, 19(3): 71-73 |
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| 作者姓名： | 曹树胜 李小京 |
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| 作者单位： | 1. 天津工业大学电气工程与自动化学院,天津,300387
2. 天津工业大学工程教学实训中心,天津,300387 |
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| 摘 要： | FIR滤波器能够实现线性相位特性，可以做到无相位失真，而广泛应用于现代信号处理领域。运用FPGA可编程的特点，采用分布式算法，实现高速有限脉冲响应（FIR）滤波器。仿真结果和板级测试表明这种方法快速，消耗硬件资源少。
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| 关 键 词： | FIR滤器 分布式算法 FPGA |
Design of high-speed FIR digital filter based on FPGA |
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| CAO Shu-sheng , LI Xiao-jing. Design of high-speed FIR digital filter based on FPGA[J]. Electronic Instrumentation Customer, 2012, 19(3): 71-73 |
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| Authors: | CAO Shu-sheng LI Xiao-jing |
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| Affiliation: | 1.College of Electrical and Automation,Tianjin Polytechnic University,Tianjin 300389,China; 2.Engering Teaching Training Center,Tianjin Polytechnic University,Tianjin 300389,China) |
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| Abstract: | Realization of digital Finite-impulse-Response(FIR) filter are so important issue for digital communications and signal processing application.As its good line phase character,FIR filter can avoid phase distortion.The filter structure is based on Distributed Arithmetic(DA),which is able to calculate the inner product by shifting and accumulating of partial products and storing in look-up table.In this paper an FPGA-base system is presented..The simulation and experimental results verify that this strategy possess good time closure and less resource usage. |
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| Keywords: | FIR filter distributed arithmetic FPGA |
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