S波段功率SiC MESFET(芯片)研制

介绍了一种S波段功率SiC MESFET芯片的研制技术。针对SiC材料的特点,对4H-SiC外延材料进行了设计和仿真,同时对Al记忆效应进行了研究,优化了4H-SiC外延生长技术。研究了栅长与沟道厚度纵横比(Lg/a)对短沟道效应和漏极势垒降低效应的影响。采用了凹槽栅结构和体标记电子束直写技术以及热氧化SiO2和SiNx复合钝化层设计等新制备工艺,实现了栅、漏泄漏电流的减小和源、漏击穿电压的提高。测试结果表明,功率SiC MESFET芯片在3.4 GHz频率下脉冲输出功率大于45 W,功率增益8.5 dB,漏极效率40%。测试条件为漏极工作电压48 V,脉宽100μs,占空比10%。

Study on the Fabrication of S-Band Power SiC MESFET (Chip)

The S-Band high power SiC MESFET chip was researched.The 4H-SiC epitaxial layers was emulated and designed,the Al memory effection was reasearched,and the 4H-SiC epitaxial growth technology was optimized.The effection on the short channel effection and the drain protential barrier reduction effection by the ratio of gate length and channel depth were researched.A new process technique with the groove gate,electron beam drawing body sign,hot oxidizing SiO2 layer,and compound passivation were used for the fabrication of the chip.The grid current and drain current were decreased,and the source current was increased.The test results show that the output pulse power is more than 45 W,the power gain is 8.5 dB and the drain efficiency is 40% at 3.4 GHz,48 V drain voltage,100 μs pulse width and 10% duty cycle.