| Abstract: | This article reports the DC and analog/radio frequency (RF) response of a newly invented device called vertical super-thin body (VSTB) FET towards high-k (Si3N4/HfO2) and low-k (SiO2) gate dielectrics in conjunction with the scaling effect through a well-calibrated Sentaurus TCAD tool. At channel length (LG) of 20 nm, compared to SiO2, Si3N4 improves various DC parameters such as off-state leakage current (Ioff), on-current (Ion), on-to-off current ratio (Ion/Ioff ratio), subthreshold swing (SS), and drain-induced-barrier-lowering (DIBL) by 77.15%, 26.2%, one order of magnitude, 15.78%, and 36.2%, respectively. On the other hand, a higher improvement is seen in all these DC parameters for the HfO2 gate dielectric (Ioff, Ion, Ion/Ioff ratio, SS, DIBL improves respectively by 91.8%, 41.57%, two orders of magnitude, 28.28%, and 62.71%). The underlying physics behind such excellent improvement is explained by the device off-state energy band diagram, electrostatic potential, and channel electron density profile for each dielectric. Further, for all the gate dielectrics considered, the device characteristics were studied for a wide range of LG from 10 to 50 nm to reveal the scaling impact on the device performance. Irrespective of the gate dielectric material, the device exhibits excellent performance at LG = 10 nm, which in turn indicates to the brilliant scalability of this new device. Besides, although Si3N4 and HfO2 increase gate capacitance (Cgg)/gate-drain capacitance (Cgd), due to the extremely low values of Cgg/Cgd, enhanced unit gain cut-off frequency, and gain-bandwidth-product is achieved. In addition, the increased transconductance (gm) of the device applying Si3N4/HfO2 gate dielectric leads to a higher peak value of TGF, intrinsic gain, TFP, GFP, and GTFP. This study intends to expand the fundamental knowledge about such a new device as a VSTB FET and hence, aims to be utilized in the future research of this novel device. |
