A New FPGA for DSP Applications Integrating BIST Capabilities |
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Authors: | Alex Gonsales Marcelo Lubaszewski Luigi Carro Michel Renovell |
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Affiliation: | (1) PPGC—Instituto de Informática, UFRGS, P.O. Box, 15064—, Porto Alegre, RS 91501-970, Brazil;(2) PPGEE—Dept. Engenharia Elétrica, UFRGS, Av. Osvaldo Aranha, 103—, Porto Alegre, RS 90035-190, Brazil;(3) LIRMM 161, Rue Ada, 34392 Montpellier Cédex 5, France |
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Abstract: | This work proposes a new FPGA architecture, to meet the requirements of signal processing and testing of current system-on-chip designs. The proposed architecture provides the hardware reuse and the reconfigurability advantages of an FPGA, not only for the system functionality, but also for the system testing, while keeping the performance level required by current signal processing applications. This paper presents the new FPGA model, along with preliminary experimental results that clearly show the possible advantages at the system level of merging design and test in a reconfigurable device. |
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Keywords: | reconfigurable architectures FPGA hardware test BIST digital signal processing DSP |
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