| FAULT DETECTION TEST SET FOR TESTABLE REALIZATIONS OF LOGIC FUNCTIONS WITH ESOP EXPRESSIONS |
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| 引用本文： | Pan Zhongliang Chen Guangju. FAULT DETECTION TEST SET FOR TESTABLE REALIZATIONS OF LOGIC FUNCTIONS WITH ESOP EXPRESSIONS[J]. 电子科学学刊(英文版), 2007, 24(2): 238-244. DOI: 10.1007/s11767-005-0224-5 |
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| 作者姓名： | Pan Zhongliang Chen Guangju |
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| 作者单位： | [1]School of Physics and Telecommunication Engineering, South China Normal University, Guangzhou 510631, China [2]Institute of Automation Engineering, University of Electronic Science and Technology of China Chengdu 610054, China |
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| 基金项目： | 国家自然科学基金，The Education Department of Guangdong Province of China |
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| 摘 要： | The circuit testable realization and its fault detection for logic functions with ESOP （EXOR-Sum-Of-Products） expressions are studied. First of all, for the testable realization by using XOR gate cascade, a test set with 2n ＋ m ＋ 1 vectors for the detections of AND bridging faults and a test set with 2n ＋ m vectors for the detections of OR bridging faults are presented. Secondly, for the testable realization by using ）（OR gate tree, a test set with 2n ＋ m vectors for the detections of AND bridging faults and a test set with 3n ＋ m ＋ 1 vectors for the detections of OR bridging faults are presented. Finally, a single fault test set with n ＋ 5 vectors for the XOR gate tree realization is presented. Where n is the number of input variables and m is the number of product terms in a logic function.
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| 关 键 词： | 故障检测 逻辑函数 可测性设计 检测集 数字电路 ESOP |
| 收稿时间： | 2005-11-15 |
| 修稿时间： | 2005-12-20 |
Fault detection test set for testable realizations of logic functions with ESOP expressions |
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| Pan Zhongliang,Chen Guangju. Fault detection test set for testable realizations of logic functions with ESOP expressions[J]. Journal of Electronics, 2007, 24(2): 238-244. DOI: 10.1007/s11767-005-0224-5 |
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| Authors: | Pan Zhongliang Chen Guangju |
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| Affiliation: | 1. School of Physics and Telecommunication Engineering, South China Normal University,Guangzhou 510631, China
2. Institute of Automation Engineering, University of Electronic Science and Technology of China, Chengdu 610054, China |
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| Abstract: | The circuit testable realization and its fault detection for logic functions with ESOP (EXOR-Sum-Of-Products) expressions are studied. First of all, for the testable realization by using XOR gate cascade, a test set with 2n m 1 vectors for the detections of AND bridging faults and a test set with 2n m vectors for the detections of OR bridging faults are presented. Secondly, for the testable realization by using XOR gate tree, a test set with 2n m vectors for the detections of AND bridging faults and a test set with 3n m 1 vectors for the detections of OR bridging faults are presented. Finally, a single fault test set with n 5 vectors for the XOR gate tree realization is presented. Where n is the number of input variables and m is the number of product terms in a logic function. |
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| Keywords: | Logic functions Testable realization Fault detection Single faults Bridging faults |
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