| 基于VHDL语言的并行数字相关器的数据通道设计 |
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| 引用本文： | 张欣.基于VHDL语言的并行数字相关器的数据通道设计[J].半导体技术,2003,28(1):40-43. |
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| 作者姓名： | 张欣 |
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| 作者单位： | 成都Nimrod-Silicon微系统设计有限公司,四川,成都,610041 |
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| 摘 要： | 在采用并行数字相关器对直扩码进行解扩时,其数据通道设计十分关键。对数据通道使用流水线技术,可以提高其运算速度。整个数字相关器用VHDL语言来描述,经逻辑综合后,适配到FPGA芯片中。文中还给出布局布线后的时序仿真。
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| 关 键 词： | 数字相关器 VHDL 数据通道 |
| 文章编号： | 1003-353X(2003)01-0040-04 |
A data path design of parallel digital correlator based on VHDL |
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| Zhang xin.A data path design of parallel digital correlator based on VHDL[J].Semiconductor Technology,2003,28(1):40-43. |
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| Authors: | Zhang xin |
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| Abstract: | The data path design is quite important when it is dispread for spread-spectrum codewith parallel digital correlator.The data path is improved in operation speed by pipeline technology.The digital correlator is described by VHDL language and be fitted to the PAGA chips after logicsynthesizing. It also presents timing simulation in placement and routing. |
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| Keywords: | digital correlator VHDL data path |
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